Abstract: The present invention provides compounds, pharmaceutically acceptable compositions thereof, and methods of using the same.

Abstract: A semiconductor device may include the following elements: a first doped portion; a second doped portion; an enclosing member, which encloses both the first doped portion and the second doped portion; a first barrier, which directly contacts the first doped portion; a second barrier, which directly contacts the second doped portion; a dielectric member, which is positioned between the first barrier and the second barrier and directly contacts each of the first barrier and the second barrier; a third barrier, which directly contacts the first doped portion; and a device component, wherein a portion of the device component is positioned between the dielectric member and the third barrier.

Abstract: A semiconductor device and method of fabricating the semiconductor device are disclosed. The method includes forming a plurality of gate electrodes at a predetermined interval on a surface of a semiconductor substrate, forming spacers on sidewalls of the gate electrodes, depositing an interconnection layer conformally on the surface of the semiconductor substrate over the gate electrodes and the spacers, selectively etching the interconnection layer, wherein at least a portion of the interconnection layer that is formed on the surface of the semiconductor substrate and sidewalls of the spacers and located between adjacent gate electrodes remains after the selective etch, and forming an electrical contact on the etched interconnection layer located between the adjacent gate electrodes.

Abstract: A method for forming a semiconductor device includes forming a buried doped layer in a semiconductor substrate and forming a plurality of first trenches that expose the buried doped layer. A first dielectric layer is formed covering sidewalls of the first trenches, and a doped polysilicon layer is formed covering side surfaces of the first dielectric layer and bottom portions of the first trenches. The method also includes forming a second trench in each of the plurality of first trenches, each second trench extending through a bottom portion of the doped polysilicon layer and the buried doped layer into a lower portion of the substrate. The method also includes forming a second dielectric layer inside each second trench. An isolation pocket structure is formed that includes the doped buried layer at the bottom and sidewalls that includes the doped polysilicon layer sandwiched between the first and second dielectric layers.

Abstract: The present invention provides compounds, pharmaceutically acceptable compositions thereof, and methods of using the same.

Abstract: A semiconductor device and method of fabricating the semiconductor device are disclosed. The method includes forming a plurality of gate electrodes at a predetermined interval on a surface of a semiconductor substrate, forming spacers on sidewalls of the gate electrodes, depositing an interconnection layer conformally on the surface of the semiconductor substrate over the gate electrodes and the spacers, selectively etching the interconnection layer, wherein at least a portion of the interconnection layer that is formed on the surface of the semiconductor substrate and sidewalls of the spacers and located between adjacent gate electrodes remains after the selective etch, and forming an electrical contact on the etched interconnection layer located between the adjacent gate electrodes.

Abstract: A semiconductor device is provided. The semiconductor device includes a semiconductor substrate; and a body region and a drift region formed in the semiconductor substrate. The semiconductor device also includes a bulk region and a source region formed in the body region. Further, the semiconductor device includes a drain region and a first shallow trench isolation structure having a ladder-like bottom formed in the drift region. Further, the semiconductor device also includes a gate structure spanning over an edge of the body region and an edge of the drift region formed on the semiconductor substrate and covering a portion of the first shallow trench isolation structure.

Abstract: An electronic device includes an antenna for a transceiver to operate in a plurality of frequencies. The antenna includes a first portion that is coupled to an elongate element and is configured to enable the transceiver to operate in a first low-band frequency and a first high-band frequency. A second portion is also coupled to the elongate element. The second portion is configured to enable the transceiver to operate in a second high-band frequency. A third portion is coupled to the elongate element and is situated between the first and second portions. The third portion is configured to tune the first and the second high-band frequencies associated with the first and second portions. A tuning element is configured to tune the low-band frequency associated with the first portion such that the first and the second high-band frequencies are not significantly affected by tuning the tuning element.

Abstract: Various embodiments provide LDMOS devices and fabrication methods. An N-type buried isolation region is provided in a P-type substrate. A P-type epitaxial layer including a first region and a second region is formed over the P-type substrate. The first region is positioned above the N-type buried isolation region, and the second region surrounds the first region. An annular groove is formed in the second region to surround the first region and to expose a surface of the N-type buried isolation region. Isolation layers are formed on both sidewalls of the annular groove. An annular conductive plug is formed in the annular groove between the isolation layers. The annular conductive plug is in contact with the N-type buried isolation region at the bottom of the annular conductive plug. A gate structure of an LDMOS transistor is formed over the first region of the P-type epitaxial layer.

Abstract: A semiconductor device is provided. The semiconductor device includes a semiconductor substrate; and a body region and a drift region formed in the semiconductor substrate. The semiconductor device also includes a bulk region and a source region formed in the body region. Further, the semiconductor device includes a drain region and a first shallow trench isolation structure having a ladder-like bottom formed in the drift region. Further, the semiconductor device also includes a gate structure spanning over an edge of the body region and an edge of the drift region formed on the semiconductor substrate and covering a portion of the first shallow trench isolation structure.

Abstract: An electronic device includes a main antenna and a diversity antenna. The diversity antenna includes a first portion configured to enable a transceiver to receive a signal in a first low-band frequency of four frequency bands. A second portion enables the transceiver to receive a signal in first and second high-band frequencies. A third portion is RF coupled to the first portion when the third portion is connected to ground. The third portion tunes the first portion such that the transceiver receives a signal in a second low-band frequency. A switch is connected between the third portion and the ground. When the switch is open, the first portion enables the transceiver to receive the signal in the first low-band frequency. When the switch is closed, the third portion tunes the first portion to enable the transceiver to receive the signal in the second low-band frequency.

Abstract: Various embodiments provide LDMOS devices and fabrication methods. An N-type buried isolation region is provided in a P-type substrate. A P-type epitaxial layer including a first region and a second region is formed over the P-type substrate. The first region is positioned above the N-type buried isolation region, and the second region surrounds the first region. An annular groove is formed in the second region to surround the first region and to expose a surface of the N-type buried isolation region. Isolation layers are formed on both sidewalls of the annular groove. An annular conductive plug is formed in the annular groove between the isolation layers. The annular conductive plug is in contact with the N-type buried isolation region at the bottom of the annular conductive plug. A gate structure of an LDMOS transistor is formed over the first region of the P-type epitaxial layer.

Abstract: A device for wireless communication including a wireless transceiver, a printed circuit board (PCB) coupled to the wireless transceiver, a first antenna and a second antenna. The first antenna is coupled to the PCB at a feed point and grounded at a ground point. The first antenna is a quarter-wavelength antenna communicating signals with the wireless transceiver at a first frequency band. The second antenna is coupled to the first antenna at the feed point and grounded at a further ground point. The second antenna is a half-wavelength antenna communicating signals with the wireless transceiver at a second frequency band.

Abstract: An electronic device includes a main antenna and a diversity antenna. The diversity antenna includes a first portion configured to enable a transceiver to receive a signal in a first low-band frequency of four frequency bands. A second portion enables the transceiver to receive a signal in first and second high-band frequencies. A third portion is RF coupled to the first portion when the third portion is connected to ground. The third portion tunes the first portion such that the transceiver receives a signal in a second low-band frequency. A switch is connected between the third portion and the ground. When the switch is open, the first portion enables the transceiver to receive the signal in the first low-band frequency. When the switch is closed, the third portion tunes the first portion to enable the transceiver to receive the signal in the second low-band frequency.

Abstract: An electronic device includes an antenna for a transceiver to operate in a plurality of frequencies. The antenna includes a first portion that is coupled to an elongate element and is configured to enable the transceiver to operate in a first low-band frequency and a first high-band frequency. A second portion is also coupled to the elongate element. The second portion is configured to enable the transceiver to operate in a second high-band frequency. A third portion is coupled to the elongate element and is situated between the first and second portions. The third portion is configured to tune the first and the second high-band frequencies associated with the first and second portions. A tuning element is configured to tune the low-band frequency associated with the first portion such that the first and the second high-band frequencies are not significantly affected by tuning the tuning element.

Abstract: The invention is directed to novel synthetic C-glycolipids that selectively induce a ThI-type immune response characterized by enhanced IL-12 secretion and increased activation of dendritic cells. The compounds of the invention are thereby useful in treating infections, cancers, cell proliferative disorders, and autoimmune diseases, both directly and as adjuvants.

Abstract: A semiconductor device and method of fabricating the semiconductor device are disclosed. The method includes forming a plurality of gate electrodes at a predetermined interval on a surface of a semiconductor substrate, forming spacers on sidewalls of the gate electrodes, depositing an interconnection layer conformally on the surface of the semiconductor substrate over the gate electrodes and the spacers, selectively etching the interconnection layer, wherein at least a portion of the interconnection layer that is formed on the surface of the semiconductor substrate and sidewalls of the spacers and located between adjacent gate electrodes remains after the selective etch, and forming an electrical contact on the etched interconnection layer located between the adjacent gate electrodes.

Abstract: The present invention provides compounds, pharmaceutically acceptable compositions thereof, and methods of using the same.

Abstract: Methods and apparatus are provided for adjusting the electromagnetic fields produced by telephones or other mobile devices capable of wireless communication. A wireless communication device includes a substrate having a ground plane. An antenna is coupled to the ground plane, and electrical currents are produced in the ground plane during operation of the antenna. A switchable counterpoise circuit that includes a conducting element and an inductor in series is provided on the substrate. The switchable counterpoise is selectively coupled to the ground plane based upon an operating mode of the wireless communications device, thereby adjusting the electrical currents flowing in the ground plane when the counterpoise is active. The changes in the ground plane currents can produce adjustments in the electromagnetic fields produced by the device, thereby improving hearing aid compatibility (HAC) of the device.

Abstract: A device for wireless communication including a wireless transceiver, a printed circuit board (PCB) coupled to the wireless transceiver, a first antenna and a second antenna. The first antenna is coupled to the PCB at a feed point and grounded at a ground point. The first antenna is a quarter-wavelength antenna communicating signals with the wireless transceiver at a first frequency band. The second antenna is coupled to the first antenna at the feed point and grounded at a further ground point. The second antenna is a half-wavelength antenna communicating signals with the wireless transceiver at a second frequency band.