Abstract: A display device is provided, including: a display panel; a backlight module; a circuit board, arranged on a side of the backlight module facing away from the display panel; a flexible circuit board, connected to the circuit board and the display panel, where the flexible circuit board includes a bending portion arranged on a side of the backlight module and extending from the display panel to the circuit board; a circuit board protective frame, arranged around the circuit board and the flexible circuit board, where an opening is provided on a first portion of the circuit board protective frame, and the first portion is a portion of the circuit board protective frame facing the bending portion; and a buffer structure, fixed on the circuit board protective frame, arranged parallel to the circuit board protective frame, and covering the opening.

Abstract: Disclosed are a shift register unit and a method for driving the same, a gate drive circuit, and a display device. The pull-down control circuit in the shift register unit is capable of controlling a potential of a second pull-up node under control of the input signal provided by an input signal terminal. The pull-down circuit is capable of performing noise reduction on a first pull-up node and an output terminal under control of the second pull-up node. Since the potential of the second pull-up node is not pulled up due to the bootstrap effect, the threshold voltages of transistors in the pull-down circuit are less shifted, and the service life of the shift register unit is relatively long.

Abstract: The present disclosure relates to the field of display, in particular to a composition for an overcoat layer, a preparation method for the same, an overcoat layer material, and a display substrate and a display device including the overcoat layer material. The composition for the overcoat layer comprises: 10 to 30% by weight of styrene, 10 to 30% by weight of an epoxy resin, 1 to 3% by weight of a crosslinking agent, 0.1 to 0.5% by weight of a photoinitiator and/or a thermal initiator, 1 to 3% by weight of a surfactant, and 40 to 77% by weight of a solvent. The composition for the overcoat layer has styrene as a main monomer component, and may be initiated to cure by an initiator to obtain the overcoat layer material.

Abstract: The present disclose is related to a gate drive unit. The gate drive unit may include a shift register; and a signal filter. The signal filter may respectively connect to a clock signal terminal, a filter output terminal, an input terminal and a reset terminal. The signal filter may be configured, under control of an effective signal provided by the input terminal, to transmit a clock signal of the clock signal terminal to the filter output terminal after the input terminal stops providing the effective signal and before the reset terminal provides an effective signal and, under control of an effective signal provided by the reset terminal, to disconnect the clock signal terminal and the filter output terminal.

Abstract: Provided are an array substrate, a display panel and a display device. The array substrate includes a display region and a peripheral region. The peripheral region includes a chip-on-film bonding region, and the peripheral region has a recessed structure configured to fill a bonding material. The recessed structure is between the chip-on-film bonding region and a lateral side of the array substrate. The chip-on-film bonding region is between the display region and the lateral side. By disposing a recessed structure configured to fill the bonding material in the peripheral region, a gap is difficult to occur between the chip-on-film in the chip-on-film bonding region and the array substrate, preventing entry of water vapor to cause corrosion of lead wires and short circuits of lead wires. The defect ratio of the array substrate, the display panel, and the display device is reduced, and the product quality is improved.

Abstract: The present disclose is related to a gate drive unit. The gate drive unit may include a shift register; and a signal filter. The signal filter may respectively connect to a clock signal terminal, a filter output terminal, an input terminal and a reset terminal. The signal filter may be configured, under control of an effective signal provided by the input terminal, to transmit a clock signal of the clock signal terminal to the filter output terminal after the input terminal stops providing the effective signal and before the reset terminal provides an effective signal and, under control of an effective signal provided by the reset terminal, to disconnect the clock signal terminal and the filter output terminal.

Abstract: The present disclosure relates to the field of display, in particular to a composition for an overcoat layer, a preparation method for the same, an overcoat layer material, and a display substrate and a display device including the overcoat layer material. The composition for the overcoat layer comprises: 10 to 30% by weight of styrene, 10 to 30% by weight of an epoxy resin, 1 to 3% by weight of a crosslinking agent, 0.1 to 0.5% by weight of a photoinitiator and/or a thermal initiator, 1 to 3% by weight of a surfactant, and 40 to 77% by weight of a solvent. The composition for the overcoat layer has styrene as a main monomer component, and may be initiated to cure by an initiator to obtain the overcoat layer material.

Abstract: A display device is provided, including: a display panel; a backlight module; a circuit board, arranged on a side of the backlight module facing away from the display panel; a flexible circuit board, connected to the circuit board and the display panel, where the flexible circuit board includes a bending portion arranged on a side of the backlight module and extending from the display panel to the circuit board; a circuit board protective frame, arranged around the circuit board and the flexible circuit board, where an opening is provided on a first portion of the circuit board protective frame, and the first portion is a portion of the circuit board protective frame facing the bending portion; and a buffer structure, fixed on the circuit board protective frame, arranged parallel to the circuit board protective frame, and covering the opening.

Abstract: A shift register includes an output sub-circuit and a compensation sub-circuit. The output sub-circuit is coupled to a pull-up node, a clock signal terminal and a signal output terminal. The compensation sub-circuit is coupled to the pull-up node, the clock signal terminal and the signal output terminal. The output sub-circuit is configured to transmit a voltage of the clock signal terminal to the signal output terminal under control of a voltage of the pull-up node, The compensation sub-circuit is configured to transmit a voltage of the signal output terminal to the pull-up node under control of the voltage of the pull-up node and the voltage of the clock signal terminal.

Abstract: Disclosed are a shift register unit and a method for driving the same, a gate drive circuit, and a display device. The pull-down control circuit in the shift register unit is capable of controlling a potential of a second pull-up node under control of the input signal provided by an input signal terminal. The pull-down circuit is capable of performing noise reduction on a first pull-up node and an output terminal under control of the second pull-up node. Since the potential of the second pull-up node is not pulled up due to the bootstrap effect, the threshold voltages of transistors in the pull-down circuit are less shifted, and the service life of the shift register unit is relatively long.

Abstract: A shift register includes an output sub-circuit and a compensation sub-circuit. The output sub-circuit is coupled to a pull-up node, a clock signal terminal and a signal output terminal. The compensation sub-circuit is coupled to the pull-up node, the clock signal terminal and the signal output terminal. The output sub-circuit is configured to transmit a voltage of the clock signal terminal to the signal output terminal under control of a voltage of the pull-up node, The compensation sub-circuit is configured to transmit a voltage of the signal output terminal to the pull-up node under control of the voltage of the pull-up node and the voltage of the clock signal terminal.

Abstract: A color resist material of a color filter and a method for preparing a color resist pattern of a color filter are provided. The color resist material of a color filter includes: a polyfunctional monomer including a divinylbenzene monomer.

Abstract: Provided are an array substrate, a display panel and a display device. The array substrate includes a display region and a peripheral region. The peripheral region includes a chip-on-film bonding region, and the peripheral region has a recessed structure configured to fill a bonding material. The recessed structure is between the chip-on-film bonding region and a lateral side of the array substrate. The chip-on-film bonding region is between the display region and the lateral side. By disposing a recessed structure configured to fill the bonding material in the peripheral region, a gap is difficult to occur between the chip-on-film in the chip-on-film bonding region and the array substrate, preventing entry of water vapor to cause corrosion of lead wires and short circuits of lead wires. The defect ratio of the array substrate, the display panel, and the display device is reduced, and the product quality is improved.

Abstract: A color resist material of a color filter and a method for preparing a color resist pattern of a color filter are provided. The color resist material of a color filter includes: a polyfunctional monomer including a divinylbenzene monomer.

Abstract: The present disclosure provides a color filter substrate and a method for manufacturing the same, a display panel and a display device. The method includes: forming black matrix above a base substrate, the black matrix including light blocking lines intersected with each other; forming first planarization layer above the base substrate, the first planarization layer being filled between adjacent light blocking lines; forming a color filter layer above the first planarization layer and the black matrix, an orthographic projection of the color filter layer on the base substrate covering that of the first planarization layer on the base substrate and partially covering the orthographic projection of the black matrix on the base substrate; forming a second planarization layer above the color filter layer, an orthographic projection of the second planarization layer on the base substrate covering those of the black matrix and the color filter layer on the base substrate.