Patents by Inventor Guanyu ZHU
Guanyu ZHU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230205622Abstract: A quantum computer includes a quantum processor that includes a first plurality of qubits arranged in a hexagonal lattice pattern such that each is substantially located at a hexagon apex, and a second plurality of qubits each arranged substantially along a hexagon edge. Each of the first plurality of qubits is coupled to three nearest-neighbor qubits of the second plurality of qubits, and each of the second plurality of qubits is coupled to two nearest-neighbor qubits of the first plurality of qubits. Each of the second plurality of qubits is a control qubit at a control frequency. Each of the first plurality of qubits is a target qubit at one of a first target frequency or a second target frequency. The quantum computer includes an error correction device configured to operate on the hexagonal lattice pattern of the plurality of qubits so as to detect and correct data errors.Type: ApplicationFiled: January 13, 2023Publication date: June 29, 2023Inventors: Andrew W. Cross, Christopher Chamberland, Jay M. Gambetta, Jared B. Hertzberg, Theodore J. Yoder, Guanyu Zhu
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Patent number: 11556411Abstract: A quantum computer includes a quantum processor that includes a first plurality of qubits arranged in a hexagonal lattice pattern such that each is substantially located at a hexagon apex, and a second plurality of qubits each arranged substantially along a hexagon edge. Each of the first plurality of qubits is coupled to three nearest-neighbor qubits of the second plurality of qubits, and each of the second plurality of qubits is coupled to two nearest-neighbor qubits of the first plurality of qubits. Each of the second plurality of qubits is a control qubit at a control frequency. Each of the first plurality of qubits is a target qubit at one of a first target frequency or a second target frequency. The quantum computer includes an error correction device configured to operate on the hexagonal lattice pattern of the plurality of qubits so as to detect and correct data errors.Type: GrantFiled: August 15, 2019Date of Patent: January 17, 2023Assignee: International Business Machines CorporationInventors: Andrew W. Cross, Christopher Chamberland, Jay M. Gambetta, Jared B. Hertzberg, Theodore J. Yoder, Guanyu Zhu
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Patent number: 11455207Abstract: A method of error correction for a quantum computer includes identifying each of a plurality of physical qubits arranged in a lattice pattern over a surface in a quantum processor of the quantum computer as a one of a data qubit, an ancilla qubit or a flag qubit to define a plurality of data qubits, ancilla qubits and flag qubits. Each pair of interacting data qubits interact with a flag qubit and adjacent flag qubits both interact with a common ancilla qubit. The method further includes performing measurements of weight-four stabilizers, weight-two stabilizers, or both of a surface code formed using at least a sub-plurality of the plurality of physical qubits, or performing measurements of weight-four Bacon-Shor type gauge operators; and correcting fault-tolerantly quantum errors in one or more of the at least sub-plurality of physical qubits based on a measurement from at least one flag qubit.Type: GrantFiled: July 15, 2019Date of Patent: September 27, 2022Assignee: International Business Machines CorporationInventors: Christopher Chamberland, Guanyu Zhu, Theodore James Yoder, Andrew W. Cross
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Patent number: 11449783Abstract: Techniques regarding encoding a quantum circuit to a trivalent lattice scheme to identify flag qubit outcomes are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a memory that can store computer executable components. The system can also comprise a processor, operably coupled to the memory, and that can execute the computer executable components stored in the memory. The computer executable components can comprise a graph component that can encode a quantum circuit to a trivalent lattice that maps an ancilla qubit to a plurality of data qubits via a plurality of flag qubits based on a connectivity scheme of the quantum circuit.Type: GrantFiled: October 23, 2019Date of Patent: September 20, 2022Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Christopher Chamberland, Theodore James Yoder, Andrew W. Cross, Guanyu Zhu
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Publication number: 20220188112Abstract: Systems, computer-implemented methods, and computer program products to facilitate logical Hadamard gate operation and gauge fixing in subsystem codes are provided. According to an embodiment, a system can comprise a processor that executes computer executable components stored in memory. The computer executable components can comprise a gauge fixing component that applies a gauge fixing operation to a subsystem code of an encoded qubit to generate a switched subsystem code. The computer executable components can further comprise a transverse component that applies a transversal Hadamard operation to the switched subsystem code to generate a rotated subsystem code.Type: ApplicationFiled: December 14, 2020Publication date: June 16, 2022Inventors: Guanyu Zhu, Andrew W. Cross
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Patent number: 11237980Abstract: A file page table management method. The file page table management method is applied to a storage system in which a file system is created in a memory. According to the file page table management method, a mapping manner of a file page table can be dynamically adjusted based on an access type of an access request for accessing the memory, thereby improving memory access efficiency and saving memory space.Type: GrantFiled: June 24, 2020Date of Patent: February 1, 2022Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Huan Zhang, Jun Xu, Guanyu Zhu
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Publication number: 20210125094Abstract: Techniques regarding encoding a quantum circuit to a trivalent lattice scheme to identify flag qubit outcomes are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a memory that can store computer executable components. The system can also comprise a processor, operably coupled to the memory, and that can execute the computer executable components stored in the memory. The computer executable components can comprise a graph component that can encode a quantum circuit to a trivalent lattice that maps an ancilla qubit to a plurality of data qubits via a plurality of flag qubits based on a connectivity scheme of the quantum circuit.Type: ApplicationFiled: October 23, 2019Publication date: April 29, 2021Inventors: Christopher Chamberland, Theodore James Yoder, Andrew W. Cross, Guanyu Zhu
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Publication number: 20210019223Abstract: A method of error correction for a quantum computer includes identifying each of a plurality of physical qubits arranged in a lattice pattern over a surface in a quantum processor of the quantum computer as a one of a data qubit, an ancilla qubit or a flag qubit to define a plurality of data qubits, ancilla qubits and flag qubits. Each pair of interacting data qubits interact with a flag qubit and adjacent flag qubits both interact with a common ancilla qubit. The method further includes performing measurements of weight-four stabilizers, weight-two stabilizers, or both of a surface code formed using at least a sub-plurality of the plurality of physical qubits, or performing measurements of weight-four Bacon-Shor type gauge operators; and correcting fault-tolerantly quantum errors in one or more of the at least sub-plurality of physical qubits based on a measurement from at least one flag qubit.Type: ApplicationFiled: July 15, 2019Publication date: January 21, 2021Inventors: Christopher Chamberland, Guanyu Zhu, Theodore James Yoder, Andrew W. Cross
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Publication number: 20200341837Abstract: A quantum computer includes a quantum processor that includes a first plurality of qubits arranged in a hexagonal lattice pattern such that each is substantially located at a hexagon apex, and a second plurality of qubits each arranged substantially along a hexagon edge. Each of the first plurality of qubits is coupled to three nearest-neighbor qubits of the second plurality of qubits, and each of the second plurality of qubits is coupled to two nearest-neighbor qubits of the first plurality of qubits. Each of the second plurality of qubits is a control qubit at a control frequency. Each of the first plurality of qubits is a target qubit at one of a first target frequency or a second target frequency. The quantum computer includes an error correction device configured to operate on the hexagonal lattice pattern of the plurality of qubits so as to detect and correct data errors.Type: ApplicationFiled: August 15, 2019Publication date: October 29, 2020Inventors: Andrew W. Cross, Christopher Chamberland, Jay M. Gambetta, Jared B. Hertzberg, Theodore J. Yoder, Guanyu Zhu
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Publication number: 20200334169Abstract: A file page table management method. The file page table management method is applied to a storage system in which a file system is created in a memory. According to the file page table management method, a mapping manner of a file page table can be dynamically adjusted based on an access type of an access request for accessing the memory, thereby improving memory access efficiency and saving memory space.Type: ApplicationFiled: June 24, 2020Publication date: October 22, 2020Applicant: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Huan ZHANG, Jun XU, Guanyu ZHU
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Patent number: 10789012Abstract: A write method and a write apparatus for a storage device, where the write method includes: acquiring n numerical values that need to be written; determining n bits corresponding to the n numerical values, and information about a stuck-at fault included in the n bits; grouping the n bits into B groups of bits, so that the B groups of bits meet a grouping condition; and correspondingly writing the n numerical values according to information about a stuck-at fault included in each group of bits in the B groups of bits and a numerical value that needs to be written and that is corresponding to the information about the stuck-at fault included in each group of bits in the B groups of bits.Type: GrantFiled: January 17, 2018Date of Patent: September 29, 2020Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Jiwu Shu, Jie Fan, Guanyu Zhu
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Publication number: 20190324819Abstract: This application relates to the distributed system field, and in particular, to a resource scheduling technology for a distributed system. In a task assignment method, a share of an assigned resource of a user is obtained, a to-be-assigned task is selected from a to-be-assigned task list, and the to-be-assigned task is assigned, based on a maximum threshold, to a first computing node whose remaining resource can meet the to-be-assigned task. In addition, after the to-be-assigned task is assigned to the first computing node, at least one type of monitored resource of the first computing node meets that an amount of the type of remaining monitored resource is greater than or equal to a maximum threshold corresponding to the monitored resource.Type: ApplicationFiled: June 28, 2019Publication date: October 24, 2019Inventors: Yan ZENG, Zongfang LIN, Guanyu ZHU
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Patent number: 10452562Abstract: Embodiments of the application provide a file access method. A computing node receives a file open request that carries a file identifier. The computing node obtains an index node of a file that is identified by the file identifier. The computing node further obtains, based on the index node, a physical address space of a memory area in a file storage area, in which the file is stored. The computing node allocates a virtual address space to the file, and recodes a virtual-physical address mapping relationship by using a memory page table. The virtual-physical address mapping relationship includes a mapping relationship between the virtual address space and the physical address space.Type: GrantFiled: September 7, 2016Date of Patent: October 22, 2019Assignee: Huawei Technologies Co., Ltd.Inventors: Hsing Mean Sha, Qingfeng Zhuge, Guanyu Zhu
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Publication number: 20190319844Abstract: This application provides a service deployment method and apparatus. The method includes: determining a first component node that needs to be deployed currently in a to-be-deployed service; obtaining, from a physical cluster, a physical node set that meets a computing resource requirement of the first component node; and obtaining, from the physical node set according to a current available network resource of each physical node in the physical node set, a physical node to which the first component node is mapped. According to the technical solution provided in this application, in a node mapping process of service deployment, that is, in a process of determining a physical node to which a component node is mapped, a computing resource and a network resource are comprehensively considered.Type: ApplicationFiled: June 26, 2019Publication date: October 17, 2019Inventors: Jian DING, Lipeng CHEN, Guanyu ZHU
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Patent number: 10372336Abstract: A file access method, a system, and a host are provided. According to the method, after obtaining information about first virtual space of a target file, a host allocates, in local virtual address space of the host, second virtual space to the target file, where the first virtual space is space allocated in global virtual address space by a management node in a distributed storage system to the target file. The host converts, according to a correspondence between the first virtual space and the second virtual space, a second access request of accessing the second virtual space into a first access request, where an address of the first virtual space in the first access request includes device information of a first storage node. Then, the host sends the first access request to a network device to route the first access request to the first storage node.Type: GrantFiled: April 28, 2017Date of Patent: August 6, 2019Assignee: Huawei Technologies Co., Ltd.Inventors: Jun Xu, Yuangang Wang, Guanyu Zhu
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Patent number: 10339100Abstract: A file management method and a file system are applied to the field of data processing technologies. The file system monitors input/output (IO) access information for operating a file, then determines an IO access mode of the file, determines a corresponding file management policy according to the IO access mode, and finally, when the obtained file management policy is inconsistent with a current management manner of the file, adjusts, according to the determined file management policy, the current management manner of the file, for example, a storage medium and a file management granularity, so as to dynamically adjust the storage medium and the file management granularity of the file according to the IO access mode of the file.Type: GrantFiled: October 21, 2016Date of Patent: July 2, 2019Assignee: Huawei Technologies Co., Ltd.Inventors: Jun Xu, Guanyu Zhu, Caizhu Luo
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Patent number: 10261715Abstract: A storage space management method and apparatus, where the method and apparatus are applied to a non-volatile memory (NVM). In a feature set that includes M image features of M idle blocks in storage space of the NVM, an idle block whose image feature is highly similar to an image feature of data to be written into the NVM is determined such that the data is written into the idle block. In this way, wear and energy consumption problems are considered during storage space allocation, and a write operation of an idle block in storage space of an NVM can consume less energy, thereby extending a life span of the NVM and reducing write operation energy consumption.Type: GrantFiled: June 16, 2017Date of Patent: April 16, 2019Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Changliang Xue, Wenlong Huang, Guanyu Zhu, Jun Xu
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Patent number: 10157143Abstract: A file access method and apparatus, and a storage system are provided. After receiving a file access request including a file identifier, first physical address space is accessed according to first virtual address space and a first mapping relationship between the first virtual address space and the first physical address space storing a file system. After obtaining, from the first physical address space, an index node of an object file indicated by the file identifier, a file page table is obtained according to information included in the index node, where the file page table records second physical address space of the object file. Then, second virtual address space is allocated to the object file. After establishing a second mapping relationship between the second physical address space and the second virtual address space, the object file in the second physical address space is accessed according to the second virtual address space.Type: GrantFiled: February 28, 2017Date of Patent: December 18, 2018Assignee: Huawei Technologies Co., Ltd.Inventors: Jun Xu, Guanyu Zhu, Qun Yu
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Patent number: 10067684Abstract: A file access method and apparatus, and a storage device are presented, where the file access method is applied to a storage device in which a file system is established based on a memory. The storage device obtains, according to a file identifier of a to-be-accessed first target file, an index node of the first target file in metadata, where the index node of the first target file stores information about first virtual space of the first target file in global virtual space. The storage device maps the first virtual space onto second virtual space of a process, and performs addressing on an added file management register to access the first target file according to a start address of the first virtual space and a base address of a page directory of the global file page table stored in the file management register.Type: GrantFiled: May 26, 2017Date of Patent: September 4, 2018Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Jun Xu, Guanyu Zhu, Yuangang Wang
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Patent number: 10061711Abstract: A file access method and apparatus, and a storage system are provided. After receiving a file access request from a process, a first physical address space is accessed according to a preset first virtual address space and a preset first mapping relationship between the first virtual address space and the first physical address space, where the first physical address space stores a file system. After obtaining an index node of a target file from the first physical address space according to a file identifier of the target file carried in the file access request, a file page table of the target file is obtained according to file page table information. The file page table records a second physical address space in the first physical address space. The target file is accessed according to the second physical address space.Type: GrantFiled: February 28, 2017Date of Patent: August 28, 2018Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Guanyu Zhu, Jun Xu, Qun Yu