Patents by Inventor Guat Kew Teh

Guat Kew Teh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9595505
    Abstract: Embodiments of three dimensional (3D) System-in-Package (SiPs) and methods for producing 3D SiPs having improved heat dissipation capabilities are provided. In one embodiment, the 3D SiP includes a heat-dissipating structure having a first principal surface and a second principal surface opposite the first principal surface. The backside of a first microelectronic device is disposed adjacent and thermally coupled to the first principal surface of the heat-dissipating structure, while the backside of a second microelectronic device is disposed adjacent and thermally coupled to the second principal surface of the heat-dissipating structure. During operation of the 3D SiP, heat generated by the microelectronic devices is conductively transferred to and dissipated through the heat-dissipating structure.
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: March 14, 2017
    Assignee: NXP USA, INC.
    Inventors: Shouhui Chen, Guat Kew Teh, Wai Keong Wong
  • Publication number: 20160148902
    Abstract: Embodiments of three dimensional (3D) System-in-Package (SiPs) and methods for producing 3D SiPs having improved heat dissipation capabilities are provided. In one embodiment, the 3D SiP includes a heat-dissipating structure having a first principal surface and a second principal surface opposite the first principal surface. The backside of a first microelectronic device is disposed adjacent and thermally coupled to the first principal surface of the heat-dissipating structure, while the backside of a second microelectronic device is disposed adjacent and thermally coupled to the second principal surface of the heat-dissipating structure. During operation of the 3D SiP, heat generated by the microelectronic devices is conductively transferred to and dissipated through the heat-dissipating structure.
    Type: Application
    Filed: November 25, 2014
    Publication date: May 26, 2016
    Inventors: SHOUHUI CHEN, GUAT KEW TEH, WAI KEONG WONG
  • Patent number: 8519519
    Abstract: A semiconductor device includes a lead frame that has a die interconnect portion and at least first and second die pads. The die interconnect portion is isolated from the die pads. The device also includes a first die and a second die attached to the first and second die pads and electrically connected to each other by way of the die interconnect portion. The first die is encapsulated in a first medium and the second die is encapsulated in a second medium, the first medium being different from the second medium.
    Type: Grant
    Filed: November 3, 2010
    Date of Patent: August 27, 2013
    Assignee: Freescale Semiconductor Inc.
    Inventors: Beng Siong Lee, Guat Kew Teh, Wai Keong Wong
  • Publication number: 20120104583
    Abstract: A semiconductor device includes a lead frame that has a die interconnect portion and at least first and second die pads. The die interconnect portion is isolated from the die pads. The device also includes a first die and a second die attached to the first and second die pads and electrically connected to each other by way of the die interconnect portion. The first die is encapsulated in a first medium and the second die is encapsulated in a second medium, the first medium being different from the second medium.
    Type: Application
    Filed: November 3, 2010
    Publication date: May 3, 2012
    Applicant: FREESCALE SEMICONDUCTOR, INC
    Inventors: Beng Siong Lee, Guat Kew Teh, Wai Keong Wong