Patents by Inventor Guckenberger John

Guckenberger John has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Monolithic integration of photonics and electronics in CMOS processes
    Patent number: 9053980
    Abstract: Methods and systems for monolithic integration of photonics and electronics in CMOS processes are disclosed and may include fabricating photonic and electronic devices on two CMOS wafers with different silicon layer thicknesses for the photonic and electronic devices with at least a portion of each of the wafers bonded together, where a first of the CMOS wafers includes the photonic devices and a second of the CMOS wafers includes the electronic devices. The electrical devices may be coupled to optical devices utilizing through-silicon vias. The different thicknesses may be fabricated utilizing a selective area growth process. Cladding layers may be fabricated utilizing oxygen implants and/or utilizing CMOS trench oxide on the CMOS wafers. Silicon may be deposited on the CMOS trench oxide utilizing epitaxial lateral overgrowth. Cladding layers may be fabricated utilizing selective backside etching. Reflective surfaces may be fabricated by depositing metal on the selectively etched regions.
    Type: Grant
    Filed: February 2, 2012
    Date of Patent: June 9, 2015
    Assignee: Luxtera, Inc.
    Inventors: Thierry Pinguet, Steffen Gloeckner, Peter De Dobbelaere, Sherif Abdalla, Daniel Kucharski, Gianlorenzo Masini, Kosei Yokoyama, Guckenberger John, Attila Mekis
  • Monolithic Integration Of Photonics And Electronics In CMOS Processes
    Publication number: 20120135566
    Abstract: Methods and systems for monolithic integration of photonics and electronics in CMOS processes are disclosed and may include fabricating photonic and electronic devices on two CMOS wafers with different silicon layer thicknesses for the photonic and electronic devices with at least a portion of each of the wafers bonded together, where a first of the CMOS wafers includes the photonic devices and a second of the CMOS wafers includes the electronic devices. The electrical devices may be coupled to optical devices utilizing through-silicon vias. The different thicknesses may be fabricated utilizing a selective area growth process. Cladding layers may be fabricated utilizing oxygen implants and/or utilizing CMOS trench oxide on the CMOS wafers. Silicon may be deposited on the CMOS trench oxide utilizing epitaxial lateral overgrowth. Cladding layers may be fabricated utilizing selective backside etching. Reflective surfaces may be fabricated by depositing metal on the selectively etched regions.
    Type: Application
    Filed: February 2, 2012
    Publication date: May 31, 2012
    Inventors: Thierry Pinguet, Steffen Gloeckner, Peter De Dobbelaere, Sherif Abdalla, Daniel Kucharski, Gianlorenzo Masini, Kosei Yokoyama, Guckenberger John, Attila Mekis