Abstract: Embodiments of the present disclosure relate to an electronic module that is structured to be incorporated into a small form factor electronic device. The electronic module includes a substrate, an active component and a passive component. The substrate includes a first surface and a second surface that is opposite the first surface. The second surface of the substrate includes a recessed area that extends through a portion of the substrate towards the first surface of the substrate. The active component is placed on the first surface of the substrate and the passive component is located in the recessed area of the second surface of the substrate.

Abstract: An output circuit of an integrated circuit device includes first and second MOS transistors including respective spaced apart pairs of source and drain regions in a substrate, arranged such that respective first and second channels of the first and second MOS transistors are laterally displaced with respect to one another. The output circuit further includes an isolation region in the substrate, disposed between the first and second MOS transistors. A first conductor connects the source region of the first MOS transistor to a power supply node. A second conductor connects the drain region of the first MOS transistor to the source region of the second MOS transistor. A third conductor connects the drain region of the second MOS transistor to an external signal pad of the integrated circuit device. The isolation region may comprise first and second insulation regions surrounding respective ones of the first and second MOS transistors, and a guard ring surrounding and separating the insulation regions.

Abstract: An output circuit of an integrated circuit device includes first and second MOS transistors including respective spaced apart pairs of source and drain regions in a substrate, arranged such that respective first and second channels of the first and second MOS transistors are laterally displaced with respect to one another. The output circuit further includes an isolation region in the substrate, disposed between the first and second MOS transistors. A first conductor connects the source region of the first MOS transistor to a power supply node. A second conductor connects the drain region of the first MOS transistor to the source region of the second MOS transistor. A third conductor connects the drain region of the second MOS transistor to an external signal pad of the integrated circuit device. The isolation region may comprise first and second insulation regions surrounding respective ones of the first and second MOS transistors, and a guard ring surrounding and separating the insulation regions.

Abstract: An output circuit of an integrated circuit device includes first and second MOS transistors including respective spaced apart pairs of source and drain regions in a substrate, arranged such that respective first and second channels of the first and second MOS transistors are laterally displaced with respect to one another. The output circuit further includes an isolation region in the substrate, disposed between the first and second MOS transistors. A first conductor connects the source region of the first MOS transistor to a power supply node. A second conductor connects the drain region of the first MOS transistor to the source region of the second MOS transistor. A third conductor connects the drain region of the second MOS transistor to an external signal pad of the integrated circuit device. The isolation region may comprise first and second insulation regions surrounding respective ones of the first and second MOS transistors, and a guard ring surrounding and separating the insulation regions.

Abstract: A liquid crystal device (LCD) driver circuit includes first through N-th input pads for respectively receiving first through N-th voltages (N>1). First through N-th electrostatic discharge (ESD) protection units are respectively connected to the first through N-th input pads, and form a discharge path when an electrostatic pulse is respectively applied through any of the first through N-th input pads. An output driver has first through N-th resistors. The first through N-th resistors respectively receive the first through N-th voltages input through the first through N-th input pads. The output driver generates a driving voltage for driving an LCD from each of the first through N-th voltages received through the first through N-th resistors, respectively. The first through N-th resistors reduce a current flowing into the output driver when the electrostatic pulse is applied. Some or all ESD protection units may include a thin gate-oxide (gox) transistor.

Abstract: An output circuit of an integrated circuit device includes first and second MOS transistors including respective spaced apart pairs of source and drain regions in a substrate, arranged such that respective first and second channels of the first and second MOS transistors are laterally displaced with respect to one another. The output circuit further includes an isolation region in the substrate, disposed between the first and second MOS transistors. A first conductor connects the source region of the first MOS transistor to a power supply node. A second conductor connects the drain region of the first MOS transistor to the source region of the second MOS transistor. A third conductor connects the drain region of the second MOS transistor to an external signal pad of the integrated circuit device. The isolation region may comprise first and second insulation regions surrounding respective ones of the first and second MOS transistors, and a guard ring surrounding and separating the insulation regions.

Abstract: A CMOS image sensor has at least one pixel at a region for sensing an image. Each pixel has a semiconductor substrate doped by a first conductivity type, a photodiode region formed of a second conductivity type shallowly at the surface of the semiconductor substrate and a reset transistor. Source/drain regions of the reset transistor are doped by the second conductivity type, and especially, the source region is doped by the second conductivity type impurity. One part of the photodiode region is covered by a pinning layer doped by the first conductivity type and becomes a fixed region. The other part of the photodiode region is an open region, adjacent to the gate electrode of the reset transistor, and partially overlapped with the source region of the reset transistor, but not covered by the pinning layer.

Abstract: An electrostatic discharge protection circuit, which is arranged between a pad input terminal and a circuit device, includes a first diode protection circuit unit and a second diode protection circuit unit. The first diode protection circuit unit includes a first diode and a second diode, which are connected in parallel between the pad input terminal and an input voltage terminal and face opposite directions. The second diode protection circuit unit includes a third diode and a fourth diode, which are connected in parallel between the pad input terminal and a substrate terminal and face opposite directions. The electrostatic discharge protection circuit can make electrostatic discharge current flow by making all the diodes operate only in a forward direction, irrespective of electrostatic discharge stress generated from the outside.

Abstract: A liquid crystal device (LCD) driver circuit includes first through N-th input pads for respectively receiving first through N-th voltages (N>1). First through N-th electrostatic discharge (ESD) protection units are respectively connected to the first through N-th input pads, and form a discharge path when an electrostatic pulse is respectively applied through any of the first through N-th input pads. An output driver has first through N-th resistors. The first through N-th resistors respectively receive the first through N-th voltages input through the first through N-th input pads. The output driver generates a driving voltage for driving an LCD from each of the first through N-th voltages received through the first through N-th resistors, respectively. The first through N-th resistors reduce a current flowing into the output driver when the electrostatic pulse is applied. Some or all ESD protection units may include a thin gate-oxide (gox) transistor.