Abstract: An electronic device can include a top side with circuit structures. The circuit structures form the bottom region of a cavity. Each cavity can be surrounded by a cavity frame made of plastic and can have a cavity cover made of semiconductor material.

Abstract: A method for manufacturing a chip housing includes a first basis having a photolithograpically structurable layer on a main face, structured into a cover. A chip has the structure at a main face between first contact elements. A second photolithograpically structurable layer applied to the main face is structured forming a recess surrounded by a wall near the structure exposing the first contact elements. Then, the first basis and the chip are merged with the structure and the cover facing and aligned with each other, and the recess closed by the cover. Removing the first basis leads to an on-chip cavity. Afterwards, a second basis and the chip are merged with the first contact elements connected to the second basis via a conductive structure. Afterwards, the second basis is removed for exposing the conductive structure. The method is less subject to cost and size limitations of known housing technologies.

Abstract: An electronic device can include a top side with circuit structures. The circuit structures form the bottom region of a cavity. Each cavity can be surrounded by a cavity frame made of plastic and can have a cavity cover made of semiconductor material.

Abstract: The invention relates to a semiconductor sensor having a base element (4) and at least one deformation element (8). The deformation element (8) is composed of a semiconductor substrate that is doped with a dopant of a first conductivity type. Piezoresistors (14) that are doped with a dopant of the opposite conductivity type are located in the deformation element (8). The deformation element (8) has at least one part that is in contact with a medium. The semiconductor sensor is characterized in that the part has a lower concentration of the dopant than a further region located between it and the piezoresistor (14).

Abstract: A silicon membrane pressure sensor which has a carrier chip and a membrane chip 3 for which overload protection is desired to protect against the pressure on the front side of the membrane. An overload member 7 is mounted between the carrier chip 2 and the membrane chip 3 such that the overload member is connected to the membrane chip at a middle island portion 5 of the membrane chip 3 and with a first distance D1 from the carrier chip 2 in the non-loaded condition such that when pressure occurs the overload member will remove the load on the membrane chip.

Abstract: A method for generating patterned structures on a monolith substrate in micro-mechanics to permit the production of at least two successive structurings with the depths required in micro-mechanics. At least two different, selectively removable etching masks which are etchable by different etching agents are applied in sequence to the substrate. A first structuring or patterning step is then employed after the last etching mask has been generated. A further etching step occurs after the removal of the last etching mask through the use of the etching masks then remaining on the substrate. The removal of additional etching masks and generating further structuring steps are repeated until the number of etching steps that have been carried out is the same as the number of etching masks that had been originally present on the monolith substrate.