Abstract: A method for synchronizing a clock signal with a reference signal is disclosed. One embodiment has a first synchronization part which has a bit pattern having a particular clock period, a pause whose length is a multiple of this clock period plus a fraction of the clock period, and a second synchronization part having the particular clock period. The method includes generating a phase difference signal which is proportional to a phase difference between the clock signal and the reference signal, filtering the phase difference signal and providing a filtered phase difference signal, driving a digital oscillator in such a manner that the frequency of the clock signal is changed on the basis of the filtered phase difference signal, the phase of the clock signal within a clock period being corrected by a value corresponding to the fraction of the clock period at an end of the pause in the reference signal.

Abstract: A method for synchronizing a clock signal with a reference signal is disclosed. One embodiment has a first synchronization part which has a bit pattern having a particular clock period, a pause whose length is a multiple of this clock period plus a fraction of the clock period, and a second synchronization part having the particular clock period.