Patents by Inventor Guenter Schagerl

Guenter Schagerl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Parent Substrate, Wafer Composite and Methods of Manufacturing Crystalline Substrates and Semiconductor Devices
    Publication number: 20230330769
    Abstract: Provided is a machining apparatus including a profile sensor unit configured to obtain shape information about a parent substrate; and a laser scan unit configured to direct a laser beam onto the parent substrate, wherein a laser beam axis of the laser beam is tilted to an exposed main surface of the parent substrate, and wherein a track of the laser beam on the parent substrate is controllable as a function of the shape information obtained from the profile sensor unit.
    Type: Application
    Filed: June 16, 2023
    Publication date: October 19, 2023
    Inventors: Ralf Rieske, Alexander Binter, Wolfgang Diewald, Bernhard Goller, Heimo Graf, Gerald Lackner, Jan Richter, Roland Rupp, Guenter Schagerl, Marko David Swoboda
  • Parent substrate, wafer composite and methods of manufacturing crystalline substrates and semiconductor devices
    Patent number: 11712749
    Abstract: Provided is a parent substrate that includes a central region and an edge region. The edge region surrounds the central region. A detachment layer is formed in the central region. The detachment layer extends parallel to a main surface of the parent substrate. The detachment layer includes modified substrate material. A groove is formed in the edge region. The groove laterally encloses the central region. The groove runs vertically and/or tilted to the detachment layer.
    Type: Grant
    Filed: August 6, 2020
    Date of Patent: August 1, 2023
    Assignee: Infineon Technologies AG
    Inventors: Ralf Rieske, Alexander Binter, Wolfgang Diewald, Bernhard Goller, Heimo Graf, Gerald Lackner, Jan Richter, Roland Rupp, Guenter Schagerl, Marko Swoboda
  • Parent Substrate, Wafer Composite and Methods of Manufacturing Crystalline Substrates and Semiconductor Devices
    Publication number: 20210053148
    Abstract: Provided is a parent substrate that includes a central region and an edge region. The edge region surrounds the central region. A detachment layer is formed in the central region. The detachment layer extends parallel to a main surface of the parent substrate. The detachment layer includes modified substrate material. A groove is formed in the edge region. The groove laterally encloses the central region. The groove runs vertically and/or tilted to the detachment layer.
    Type: Application
    Filed: August 6, 2020
    Publication date: February 25, 2021
    Inventors: Ralf Rieske, Alexander Binter, Wolfgang Diewald, Bernhard Goller, Heimo Graf, Gerald Lackner, Jan Richter, Roland Rupp, Guenter Schagerl, Marko Swoboda
  • Method of manufacturing semiconductor devices which allows reproducible thinning of a semiconductor body of the semiconductor devices
    Patent number: 9613804
    Abstract: One embodiment describes a method of manufacturing a semiconductor device. Here, impurities are implanted into a semiconductor body via a first side of the semiconductor body. Thereafter, a drift zone layer on the first side of the semiconductor body is formed. The following is an ablation of the semiconductor body from a second side of the semiconductor body and up to pn junction defined by impurities.
    Type: Grant
    Filed: November 24, 2014
    Date of Patent: April 4, 2017
    Assignee: Infineon Technologies Austria AG
    Inventors: Peter Irsigler, Thomas Neidhart, Guenter Schagerl, Hans-Joachim Schulze
  • Ion sensor
    Patent number: 9599586
    Abstract: The disclosure describes techniques for determining an ion concentration in a sample. According to these techniques of this disclosure, an ion concentration of a sample is determined based on detecting at least one change in an electrical characteristic of a semiconductor device due to a gate insulation layer of the semiconductor device placed in contact with the sample.
    Type: Grant
    Filed: August 27, 2012
    Date of Patent: March 21, 2017
    Assignee: Infineon Technologies AG
    Inventors: Stefan Krivec, Guenter Schagerl
  • SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING A SEMICONDUCTOR DEVICE
    Publication number: 20150076664
    Abstract: One embodiment describes a method of manufacturing a semiconductor device. Here, impurities are implanted into a semiconductor body via a first side of the semiconductor body. Thereafter, a drift zone layer on the first side of the semiconductor body is formed. The following is an ablation of the semiconductor body from a second side of the semiconductor body and up to pn junction defined by impurities.
    Type: Application
    Filed: November 24, 2014
    Publication date: March 19, 2015
    Applicant: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Peter IRSIGLER, Thomas NEIDHART, Guenter SCHAGERL, Hans-Joachim SCHULZE
  • Semiconductor device and method for producing a semiconductor device
    Patent number: 8895418
    Abstract: One embodiment describes a method of manufacturing a semiconductor device. Here, impurities are implanted into a semiconductor body via a first side of the semiconductor body. Thereafter, a drift zone layer on the first side of the semiconductor body is formed. The following is an ablation of the semiconductor body from a second side of the semiconductor body and up to pn junction defined by impurities.
    Type: Grant
    Filed: August 13, 2012
    Date of Patent: November 25, 2014
    Assignee: Infineon Technologies Austria AG
    Inventors: Peter Irsigler, Thomas Neidhart, Guenter Schagerl, Hans-Joachim Schulze
  • Ion Sensor
    Publication number: 20140055145
    Abstract: The disclosure describes techniques for determining an ion concentration in a sample. According to these techniques of this disclosure, an ion concentration of a sample is determined based on detecting at least one change in an electrical characteristic of a semiconductor device due to a gate insulation layer of the semiconductor device placed in contact with the sample.
    Type: Application
    Filed: August 27, 2012
    Publication date: February 27, 2014
    Inventors: Stefan KRIVEC, Guenter SCHAGERL
  • SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING A SEMICONDUCTOR DEVICE
    Publication number: 20130207223
    Abstract: One embodiment describes a method of manufacturing a semiconductor device. Here, impurities are implanted into a semiconductor body via a first side of the semiconductor body. Thereafter, a drift zone layer on the first side of the semiconductor body is formed. The following is an ablation of the semiconductor body from a second side of the semiconductor body and up to pn junction defined by impurities.
    Type: Application
    Filed: August 13, 2012
    Publication date: August 15, 2013
    Inventors: Peter IRSIGLER, Thomas NEIDHART, Guenter SCHAGERL, Hans-Joachim SCHULZE
  • Field effect transistor configuration with high latch-up resistance, and method for its production
    Publication number: 20030060014
    Abstract: A field effect transistor configuration includes extending the source region along a trench and below the highly doped base region in a self-adjusting manner to increase the latch-up strength.
    Type: Application
    Filed: August 28, 2002
    Publication date: March 27, 2003
    Inventors: Thomas Neidhart, Carsten Schaeffer, Guenter Schagerl