Patents by Inventor Guenter TUTSCH

Guenter TUTSCH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10854547
    Abstract: A package and method of manufacturing a package is disclosed. In one example, the package includes an electronic chip and a dielectric structure comprising a highly filled cross-linked thermoplastic material.
    Type: Grant
    Filed: February 19, 2019
    Date of Patent: December 1, 2020
    Assignee: Infineon Technologies AG
    Inventors: Joachim Mahler, Georg Meyer-Berg, Guenter Tutsch
  • Publication number: 20190287907
    Abstract: A package and method of manufacturing a package is disclosed. In one example, the package includes an electronic chip and a dielectric structure comprising a highly filled cross-linked thermoplastic material.
    Type: Application
    Filed: February 19, 2019
    Publication date: September 19, 2019
    Applicant: Infineon Technologies AG
    Inventors: Joachim Mahler, Georg Meyer-Berg, Guenter Tutsch
  • Patent number: 9666452
    Abstract: A method for manufacturing a chip package is provided. The method including: holding a carrier including a plurality of dies; forming a separation between the plurality of dies by removing from the carrier one or more portions of the carrier between the plurality of dies; forming an encapsulation material in the removed one or more portions between the plurality of dies; separating the dies through the encapsulation material.
    Type: Grant
    Filed: May 25, 2012
    Date of Patent: May 30, 2017
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Karl Adolf Dieter Mayer, Guenter Tutsch, Horst Theuss, Manfred Engelhardt, Joachim Mahler
  • Publication number: 20130313719
    Abstract: A method for manufacturing a chip package is provided. The method including: holding a carrier including a plurality of dies; forming a separation between the plurality of dies by removing from the carrier one or more portions of the carrier between the plurality of dies; forming an encapsulation material in the removed one or more portions between the plurality of dies; separating the dies through the encapsulation material.
    Type: Application
    Filed: May 25, 2012
    Publication date: November 28, 2013
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Karl Adolf Dieter MAYER, Guenter TUTSCH, Horst THEUSS, Manfred ENGELHARDT, Joachim MAHLER
  • Patent number: 6630727
    Abstract: A modularly expandable semiconductor component includes at least one carrier layer, at least one intermediate layer, at least one coverlayer, at least one semiconductor chip, external contacts and a conductor configuration. The intermediate layer is provided with at least one opening, into which the at least one semiconductor chip is inserted. The carrier layer, the intermediate layer and the coverlayer are connected one above another and form a submodule. If a plurality of submodules are installed above one another, a semiconductor component is provided in which the semiconductor chips are located in several mutually overlying planes. The semiconductor chips can be interconnected. A method for producing a semiconductor component is also provided.
    Type: Grant
    Filed: September 5, 2000
    Date of Patent: October 7, 2003
    Assignee: Infineon Technologies AG
    Inventors: Günter Tutsch, Thomas Münch
  • Patent number: 6380616
    Abstract: A semiconductor component has one or more semiconductor chips with contact pads, a number of substrate layers, component contacts and conductor tracks which establish the electrical connection between the contact pads of the semiconductor chip and the component contacts. The substrate layers are respectively provided with conductor tracks and at least one opening and the chip or chips are placed in the opening. A plurality of substrate layers are interconnected lying above one another. The conductor tracks of respective substrate layers end in an area in the vicinity of the at least one semiconductor chip and in an edge area of the respective substrate layer.
    Type: Grant
    Filed: July 17, 2000
    Date of Patent: April 30, 2002
    Assignee: Infineon Technologies AG
    Inventors: Günter Tutsch, Achim Neu