Abstract: This disclosure is directed to compensating for gain drift due to switching the output power of a transmitter of an electronic device. In some cellular network applications, the transmit power level of a transmitter may be frequently adjusted from a low power level to a high power level. If the power level is not switched to the desired power level within a given interval, the transmission signal may be distorted. To enable the transmitter to reach a desired output power within the interval, the voltage supply of a power amplifier may be raised during a low power symbol, which may produce an undesirable gain increase. To mitigate or eliminate the low power symbol gain increase, a gain compensation signal may be introduced into the transmitter. The compensation signal may be adjusted and refined by implementing a power control loop, the power control loop may include a power controller.

Abstract: This disclosure is directed to compensating for gain drift due to switching the output power of a transmitter of an electronic device. In some cellular network applications, the transmit power level of a transmitter may be frequently adjusted from a low power level to a high power level. If the power level is not switched to the desired power level within a given interval, the transmission signal may be distorted. To enable the transmitter to reach a desired output power within the interval, the voltage supply of a power amplifier may be raised during a low power symbol, which may produce an undesirable gain increase. To mitigate or eliminate the low power symbol gain increase, a gain compensation signal may be introduced into the transmitter. The compensation signal may be adjusted and refined by implementing a power control loop, the power control loop may include a signal generator.

Abstract: A signal processing device including a first signal processing chain having a first output signal; a second signal processing chain comprising a second output signal with a higher accuracy than the first output signal; a controller configured to switch, based on a desired accuracy, whether to switch between the first and second signal processing chains as a path for an original input signal; and a modifier configured to modify the original input signal, the first output signal, or the second output signal to generate a modified input, a modified first output, or a modified second output signal when the controller switches between the first and second signal processing chains.

Abstract: Embodiments of an apparatus for sample rate conversion are described. Various embodiments include an interpolator configured to interpolate a digital input data stream by using values of an interpolation phase shift control quantity to generate a digital output data stream, a computing stage configured to compute values of the interpolation phase shift control quantity, and an enabling/disabling stage configured to selectively disable the interpolator while keeping the computing stage enabled.

Abstract: Embodiments of an apparatus for sample rate conversion are described. Various embodiments include an interpolator configured to interpolate a digital input data stream by using values of an interpolation phase shift control quantity to generate a digital output data stream, a computing stage configured to compute values of the interpolation phase shift control quantity, and an enabling/disabling stage configured to selectively disable the interpolator while keeping the computing stage enabled.