Patents by Inventor Guey-Bao Huang

Guey-Bao Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6784077
    Abstract: A method of forming a silicon oxide, shallow trench isolation (STI) region, featuring a silicon rich, silicon oxide layer used to protect the STI region from a subsequent wet etch procedure, has been developed. The method features depositing a silicon oxide layer via PECVD procedures, without RF bias, using a high silane to oxygen ratio, resulting in a silicon rich, silicon oxide layer, located surrounding the STI region. The low etch rate of the silicon rich, silicon oxide layer, protect the silicon oxide STI region from buffered hydrofluoric wet etch procedures, used for removal of a dioxide pad layer.
    Type: Grant
    Filed: October 15, 2002
    Date of Patent: August 31, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co. Ltd.
    Inventors: Shih-Chi Lin, Chih Chung Lee, Guey Bao Huang, Szu-An Wu, Ying Lang Wang, Chun Chun Yeh
  • Patent number: 6436791
    Abstract: A method of forming a shallow trench isolation structure comprising the following steps. A substrate having an upper surface is provided. A pad oxide layer is formed upon the substrate. A nitride layer is formed over the pad oxide layer. The nitride layer having an upper surface. A trench is formed by etching the nitride layer, pad oxide layer and a portion of the substrate. The trench having a bottom and side walls. An oxide film is deposited upon the etched nitride layer surface, and the bottom and side walls of trench. The oxide film is removed from over the etched nitride layer surface, and the bottom of the trench to expose a portion of substrate within the trench. The removal of oxide film leaving oxide spacers over the trench side walls. Epitaxial silicon is selectively deposited over the exposed portion of substrate, filling the trench. A thermal oxide layer is formed over the epitaxial silicon, annealing the interface between the epitaxial silicon and the oxide spacers.
    Type: Grant
    Filed: June 14, 2001
    Date of Patent: August 20, 2002
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Shih-Chi Lin, Szu-An Wu, Ying-Lang Wang, Guey-Bao Huang