Abstract: Disclosed is a semiconductor memory device. In the process for the memory cell to reading stored data by selecting specific word lines, word lines neighboring the selected word line are selected at the same time, or the two bit lines are connected at the same time to the input terminals of the sense amplifiers, thus increasing the difference in voltage between both the input terminals of the sense amplifiers. Therefore, the read margin is increased, the exactness of the read operation is increased, and reliability of the device is improved.

Abstract: A semiconductor memory device and method of operating the same that replaces a fail normal word line that is coupled to a fail memory cell with a redundant word line from a redundant memory block. If the fail normal word line is selected during operation, both the fail normal word line and the redundant word line are activated at the same time to increase capacitance at the sense amplifier. Therefore, it may be possible to increase the exactness of a read operation or a refresh operation, and thereby improve reliability of a device operation by increasing a comparison margin of the sense amplifier.

Abstract: Disclosed is a semiconductor memory device. In the process for the memory cell to reading stored data by selecting specific word lines, word lines neighboring the selected word line are selected at the same time, or the two bit lines are connected at the same time to the input terminals of the sense amplifiers, thus increasing the difference in voltage between both the input terminals of the sense amplifiers. Therefore, the read margin is increased, the exactness of the read operation is increased, and reliability of the device is improved.

Abstract: Disclosed is a semiconductor memory device. In the process for the memory cell to reading stored data by selecting specific word lines, word lines neighboring the selected word line are selected at the same time, or the two bit lines are connected at the same time to the input terminals of the sense amplifiers, thus increasing the difference in voltage between both the input terminals of the sense amplifiers. Therefore, the read margin is increased, the exactness of the read operation is increased, and reliability of the device is improved.

Abstract: The present invention is directed to a semiconductor memory device and method of operating the same. In case where fail normal word lines of normal word lines from a normal memory block to which fail memory cells are connected is substituted by redundant word lines of a redundant memory block, the redundant word lines to replace the fail normal word lines are set in the redundant memory block. If the fail normal word lines are selected when the device is operated, the fail normal word lines and the redundant word lines are activated at the same time to increase capacitance of a capacitor connected to the sense amplifier. Therefore, it is possible to increase the exactness of a read operation or a refresh operation and improve reliability of a device operation, by increasing a comparable margin of the sense amplifier.

Abstract: The present invention is related to a high load resistance (HLR) type static random access memory (SRAM) which is small enough to have a profit in device integration. The present invention also provides an SRAM cell, which is easy to convert the thin film transistor (TFT) type SRAM cell into the HLR type SRAM as occasion calls. A high load resistance type static random access memory cell according to the present invention has four polysilicon layers and two metal lines, this is similar to a conventional TFT type SRAM cell. One layer of the four polysilicon layers is used for a high load resistance element and a power line according to the amount of the impurity implanted in the polysilicon layer.