Abstract: The technical field of liquid crystal display panels is related to, and an in-cell touch panel is provided. The in-cell touch panel includes a first substrate, a conductive line, an alignment film, a spacer, and a second substrate sequentially from bottom to top, and further includes a black matrix covering the conductive line. Without changing a total contact area between a first contact surface of the spacer and the conductive line, the spacer can be arranged to completely stand on the conductive line by changing a shape of the first contact surface. When the panel is made thinner or is pressed, contact and friction between the spacer and the alignment film around the conductive line can be avoided, and large-area non-uniform liquid crystal alignment can be avoided. An area of the black matrix arranged around the spacer can be greatly reduced, and accordingly an aperture ratio of pixels can be improved.

Abstract: A GOA circuit includes GOA circuit units. Each GOA circuit has a holding module A first transistor and a second transistor in the holding module holds the voltage imposed on the first control node to be at high voltage level. Also, the transistors form a direct current passage between the first control node and a first fixed voltage at high voltage level so the voltage imposed on the first control node is not lowered due to electricity leakage. The GOA circuit unit can resolve the problem of easy leakage of electricity. When the scanning signals are output by the GOA circuit unit, the stability is highly ensured.

Abstract: The present disclosure relates to an array substrate and the manufacturing method thereof. The array substrate includes a glass substrate. The shading metal layer and the buffering layer are formed on the glass substrate in sequence. The TFT layer is formed on the buffering layer, and the TFT is arranged above the shading metal layer. The insulation layer and the organic layer are formed on the TFT layer in sequence. In addition, the pixel electrode layer connects to the source/drain of the TFT via the first through hole. The touch electrode layer connects to the shading metal layer via the second through hole. The passivation layer is configured between the pixel electrode layer and the touch electrode layer. In this way, the manufacturing process is simplified, and the coupling capacitance between the touch electrode and the signal line may be effectively reduced.

Abstract: A gate driver on array circuit includes a first driver module and a second driver module. The first driver module includes a first driver unit, a first output unit, and a first reset unit. The second driver module includes a second driver unit, a second output unit, and a second reset unit. The first output unit is used for generating a present stage scan drive signal and a present stage cascade signal. The second output unit is used for generating the present stage scan drive signal and the present stage cascade signal.

Abstract: The present disclosure provides a gate driver on array (GOA) circuit, where the GOA circuit includes a GOA driving chip, a GOA driving signal line, an array substrate test chip, a test signal line, and a GOA protecting circuit. The GOA driving chip is used to generate a scan driving signal. The GOA driving signal line is used to transmit the scan driving signal to a corresponding scan line. The array substrate test chip is used to generate an array substrate test signal. The test signal line is used to transmit the array substrate test signal to the corresponding scan line. The GOA protecting circuit is arranged between the GOA driving signal line and the test signal line.

Abstract: The present disclosure relates to an array substrate and the manufacturing method thereof, and a liquid crystal panel. The array substrate includes a transparent substrate; a gate line on the transparent substrate; a touch signal line on the same layer with the gate line, and the touch signal line is arranged on the transparent substrate; a dielectric layer covering the gate line and the touch signal line, and the dielectric layer is configured with at least one first through hole; and a touch electrode arranged on the dielectric layer, the touch electrode electrically connects to the touch signal line via the first through hole. In this way, the storage capacitance may be increased, and the pixels may be fully charged when the resolution rate is high. At the same time, the coupling capacitance between the touch electrode and the Rx signal line may be reduced.

Abstract: The present disclosure provides a gate driver on array (GOA) circuit. A low level signal source is used to output a low level signal, a first high level signal source is used to output a first high level signal, and the second high level signal source is used to output the second high level signal. A cascade signal latch module is used to latch a cascade signal of a current grade. A gate driving signal generating module generates a preparation gate driving signal of the current grade. A gate driving signal outputting module is used to output a gate driving signal of the current grade.

Abstract: A liquid crystal display panel and a thin film transistor array substrate are provided. The thin film transistor array substrate includes a pixel area and a fan-out area. The fan-out area has a groove. The thin film transistor array substrate has a substrate, a light shielding layer, a buffer layer, a poly-silicon layer, a first insulating layer, a scan line layer, a second insulating layer, a data line layer, a third insulating layer, a common line layer, a touch-sensing line layer, a fourth insulating layer, and a pixel electrode layer. The present invention can prevent wire shorts.

Abstract: The present invention provides a touch control structure, comprising a touch control zone, and the touch control zone comprises touch control units and first lead wires corresponding to the touch control units, and the touch control units are arranged in array having a plurality of column of the touch control units, and the touch control units of each column are aligned in spaces from top to bottom in the touch control structure, and the first lead wires sequentially penetrate the touch control units in each column from top to bottom in the touch control structure, and the first lead wire is electrically coupled to one touch control unit, and is disconnected with the next touch control unit, which is adjacent to the touch control unit in the same column and close to the top of the touch control structure.

Abstract: A device for manufacturing an array substrate includes an exposure device for using a halftone mask to form a photoresist pattern layer on a gate insulation layer of a substrate. A polysilicon pattern layer is disposed on the substrate. A gate insulation layer covers the polysilicon pattern layer. The photoresist pattern layer includes a hollow portion corresponding to a heavily doping region of the polysilicon pattern layer, a first photoresist portion corresponding to a lightly doping region of the polysilicon pattern layer, and a second photoresist portion corresponding to an undoped region of the polysilicon pattern layer. The first photoresist portion is thinner than the second photoresist portion. A doping device is used for performing one doping process to the polysilicon pattern layer such that the heavily doping region and the lightly doping region are formed simultaneously.

Abstract: A self-capacitive touch panel structure includes a touch detection chip and multiple self-capacitance electrodes arranged as a matrix and isolated with each other. Each self-capacitance electrode connected with the touch detection chip through a connection line. Each self-capacitance electrode electrically connected with a corresponding connection line through at least one via hole. A group of connection lines connected with a same column of the multiple self-capacitance electrodes are divided into an odd number group and an even number group. The connection lines in the odd number group are sequentially connected with a terminal of a corresponding self-capacitance electrode of the same column of the self-capacitance electrodes. The connection lines in the even number group are sequentially connected with a terminal of a corresponding self-capacitance electrode of the same column of the self-capacitance electrodes.

Abstract: A control circuit of a thin film transistor, comprising: a substrate; a silicon nitride layer disposed on the substrate; a silicon dioxide layer disposed on the silicon nitride layer; a light shielding layer disposed inside the silicon nitride layer, which comprising a first light shielding region and a second light shielding region; at least one N type metal oxide semiconductor disposed on the silicon dioxide layer at a position corresponding to the first light shielding region; at least one P type metal oxide semiconductor disposed on the silicon dioxide layer at a position corresponding to the second light shielding region; each of the N type metal oxide semiconductor and the P type metal oxide semiconductor has a gate electrode layer, a first control signal received by voltage pulses of the gate electrode layer synchronized with a second control signal received by the light shielding layer in voltage variation.

Abstract: The present invention provides a LTPS TFT substrate and a manufacturing method thereof. The LIPS TFT substrate of the present invention includes a metal layer formed on a channel zone so that the metal layer, a source electrode, and a drain electrode can be used as a mask to form LDD zones in a poly-silicon layer in order to save the mask needed for separately forming the LDD zones; further, due to the addition of the metal layer that is connected to the channel zone of the poly-silicon layer, the electrical resistance of the channel zone can be effectively reduced to increase a TFT on-state current.

Abstract: This disclosure provides genetically modified plants having desirable levels of sugar release, cellulose content and reduction of recalcitrance; methods of genetically modifying plants to modulate sugar release, cellulose and lignin contents; and uses of such plants. The inventors have determined that genetic modification of PdDUF266A from Populus, encoded by locus Potri.011G009500 resulted in transgenic Populus trees with changes in lignin and cellulose content as well as altered sugar release phenotypes. Plants with altered sugar release, cellulose and lignin content, based on modulation of the expression or activity of the PdDUF266A gene, have diverse uses including pulp and paper production, and biofuel and bioproducts production.