Abstract: A magnetic field sensor array includes a plurality of sensor segments, each including a plurality of magnetic field sensors. A magnetizing current conductor is situated so as to run in the area of the magnetic field sensors in such a way that elements of the magnetic field sensors may be magnetized. A plurality of parallel-connected half-bridges, each including a high switch pJ and a low switch nJ, each include a center tap connection situated between the switches. The magnetizing current conductor is connected to each center tap connection, by means of which the magnetizing current conductor is divided into separately activatable magnetizing segments. Elements of a sensor segment are magnetized in that two switches nJ and pJ+1 having different electrical potentials, or alternatively pJ and nJ+1, of two directly adjacent half-bridges are closed simultaneously. At least one further switch nX<J or pY>J+1 or alternatively pX<J or nY>J+1 is closed.

Abstract: An out-of-plane tunneling magnetoresistive (TMR) magnetic field sensor includes a sense element that defines a sense plane and a flux guide configured to direct a magnetic field perpendicular to the sense plane into the sense plane. The magnetic field sensor further includes a first coil arranged in a first plane, a second coil electrically insulated from the first coil and arranged in a spaced-apart second plane, and drive circuitry operatively connected to the first coil and the second coil. The drive circuitry in a first mode energizes the first and second coils to generate respective first and second fields that combine to set a magnetization of the flux guide. The drive circuitry in a second mode energizes only the first coil to generate the first field so as to set a magnetization of the sense element without changing the magnetization of the flux guide.

Abstract: A magnetic field sensor array includes a plurality of sensor segments, each including a plurality of magnetic field sensors. A magnetizing current conductor is situated so as to run in the area of the magnetic field sensors in such a way that elements of the magnetic field sensors may be magnetized. A plurality of parallel-connected half-bridges, each including a high switch pJ and a low switch nJ, each include a center tap connection situated between the switches. The magnetizing current conductor is connected to each center tap connection, by means of which the magnetizing current conductor is divided into separately activatable magnetizing segments. Elements of a sensor segment are magnetized in that two switches nJ and pJ+1 having different electrical potentials, or alternatively pJ and nJ+1, of two directly adjacent half-bridges are closed simultaneously. At least one further switch nX<J or pY>J+1 or alternatively pX<j or nY>J+1 is closed.

Abstract: A magnetometer includes a measurement value transducer that supplies a signal to a first amplifier device; a summation element that reduces an output signal range of an output signal of the first amplifier device; a second amplifier device that amplifies an output signal of the summation element; a low-pass filter filtering an output signal of the second amplifier device; an analog-digital converter converting output of the filter into digital form; and a correction element that divides the digital signal by a correction factor that corresponds to the defined gain factor of the second amplifier device and adds a digital correction signal to the quotient to form a resulting signal, where a scope of the correction signal corresponds to the defined attenuation of the output signal of the first amplifier device.

Abstract: An out-of-plane tunneling magnetoresistive (TMR) magnetic field sensor includes a sense element that defines a sense plane and a flux guide configured to direct a magnetic field perpendicular to the sense plane into the sense plane. The magnetic field sensor further includes a first coil arranged in a first plane, a second coil electrically insulated from the first coil and arranged in a spaced-apart second plane, and drive circuitry operatively connected to the first coil and the second coil. The drive circuitry in a first mode energizes the first and second coils to generate respective first and second fields that combine to set a magnetization of the flux guide. The drive circuitry in a second mode energizes only the first coil to generate the first field so as to set a magnetization of the sense element without changing the magnetization of the flux guide.

Abstract: A magnetometer includes a measurement value transducer that supplies a signal to a first amplifier device; a summation element that reduces an output signal range of an output signal of the first amplifier device; a second amplifier device that amplifies an output signal of the summation element; a low-pass filter filtering an output signal of the second amplifier device; an analog-digital converter converting output of the filter into digital form; and a correction element that divides the digital signal by a correction factor that corresponds to the defined gain factor of the second amplifier device and adds a digital correction signal to the quotient to form a resulting signal, where a scope of the correction signal corresponds to the defined attenuation of the output signal of the first amplifier device.

Abstract: A magnetic field sensor includes a plurality of transducer legs coupled together as a first circuit to sense a magnetic field, wherein each transducer leg comprises a plurality of magnetoresistance sense elements. The magnetic field sensor also includes a second circuit including a first plurality of current lines, wherein each current line of the first plurality of current lines is adjacent to a corresponding plurality of magnetoresistance sense elements of a transducer leg of the plurality of transducer legs. When at least one current line of the first plurality of current lines is energized, a magnetization of each magnetoresistance sense element of the transducer leg is aligned in a first direction or a second direction opposite to the first direction. A routing pattern of the at least one current line is configured to generate an equal population of magnetoresistance sense elements with magnetization aligned in the first and second directions.

Abstract: A magnetic field sensor includes built-in self-test coils in a configuration to provide magnetic field stimulation along three axes, with a high field factor, and thus, reduce a power budget of the sensor and physical size of the self-test coils. The magnetic field sensor comprises a first bridge circuit including a plurality of sense elements configured to sense a magnetic field. The magnetic field sensor further comprises re-configurable self-test current lines coupled to a self-test source to perform high field, high power wafer and die level testing and trim, as well as low power in-situ characterization and calibration of the sensor. The self-test current lines may be routed to form a coil with multiple turns around the TMR elements.

Abstract: A magnetic field sensor includes a plurality of transducer legs coupled together as a first circuit to sense a magnetic field, wherein each transducer leg comprises a plurality of magnetoresistance sense elements. The magnetic field sensor also includes a second circuit including a first plurality of current lines, wherein each current line of the first plurality of current lines is adjacent to a corresponding plurality of magnetoresistance sense elements of a transducer leg of the plurality of transducer legs. When at least one current line of the first plurality of current lines is energized, a magnetization of each magnetoresistance sense element of the transducer leg is aligned in a first direction or a second direction opposite to the first direction. A routing pattern of the at least one current line is configured to generate an equal population of magnetoresistance sense elements with magnetization aligned in the first and second directions.

Abstract: A magnetic field sensor includes a plurality of transducer legs coupled together as a first circuit to sense a magnetic field, wherein each transducer leg comprises a plurality of magnetoresistance sense elements. The magnetic field sensor also includes a second circuit including a first plurality of current lines, wherein each current line of the first plurality of current lines is adjacent to a corresponding plurality of magnetoresistance sense elements of a transducer leg of the plurality of transducer legs. When at least one current line of the first plurality of current lines is energized, a magnetization of each magnetoresistance sense element of the transducer leg is aligned in a first direction or a second direction opposite to the first direction. A routing pattern of the at least one current line is configured to generate an equal population of magnetoresistance sense elements with magnetization aligned in the first and second directions.

Abstract: A magnetic field sensor is disclosed with built-in self-test coils in a configuration to provide magnetic field stimulation along three axes, with a high field factor, and thus, reduce a power budget of the sensor and physical size of the self-test coils. The magnetic field sensor comprises a first bridge circuit including a plurality of sense elements configured to sense a magnetic field. The magnetic field sensor further comprises re-configurable self-test current lines coupled to a self-test source to perform high field, high power wafer and die level testing and trim, as well as low power in-situ characterization and calibration of the sensor. The self-test current lines may be routed to form a coil with multiple turns around the TMR elements.

Abstract: A system, device, and method are disclosed for a tunneling magnetoresistance (TMR) magnetic sensor to effectively increase magnetic field measurement linearity and minimize cross-axis interference. The TMR magnetic sensor comprises a plurality of transducer legs, each having multiple sense elements. The TMR magnetic sensor comprises a plurality of built-in current lines located adjacent to each sense element. The current lines are routed such that two or more sense elements have magnetic responses that have opposing contributions from the cross-axis effect for a given field direction in each transducer leg within the TMR magnetic sensor. Therefore, the overall field response from each transducer leg is internally compensated and the TMR magnetic sensor has an output with minimal cross-axis interference.

Abstract: An embodiment of a discharge circuit for evacuating electric charge accumulated in circuit nodes of a charge pump during a discharge phase consequent to a shutdown of the charge pump is proposed. The charge pump is configured to bias each circuit node with a corresponding pump voltage during an operational phase of the charge pump. The discharge circuit includes a generator circuit configured to generate a discharge current during the discharge phase. The discharge circuit further includes means for evacuating the electric charge stored in each circuit node of the charge pump during a corresponding portion of the discharge phase; such means for evacuating include a respective discharge stage for each circuit node of the charge pump. Each discharge stage includes a first discharge circuit branch and a second discharge circuit branch coupled to the corresponding circuit node.

Abstract: An embodiment is proposed for trimming a programmable delay line in an integrated device, which delay line is adapted to delay an input signal being synchronous with a synchronization signal of the integrated device—by a total delay. An embodiment of a corresponding method includes the steps of: preliminary programming the delay line to provide a selected nominal value of the total delay equal to a period of the timing signal, and trimming the delay line to vary an actual value of the total delay until the actual value of the total delay matches the period of the synchronization signal.

Abstract: A column decoder is for a phase-change memory device provided with an array of memory cells, a reading stage for reading data contained in the memory cells, and a programming stage for programming the data. The column decoder selects and enables biasing of a bitline of the array and generates a current path between the bitline and the reading stage or, alternatively, the programming stage, respectively during a reading or a programming operation of the contents of the memory cells. In the column decoder, a first decoder circuit generates a first current path between the bitline and the reading stage, and a second decoder circuit, distinct and separate from the first decoder circuit, generates a second current path, distinct from the first current path, between the bitline and the programming stage.

Abstract: An embodiment of a discharge circuit for evacuating electric charge accumulated in circuit nodes of a charge pump during a discharge phase consequent to a shutdown of the charge pump is proposed. The charge pump is configured to bias each circuit node with a corresponding pump voltage during an operational phase of the charge pump. The discharge circuit includes a generator circuit configured to generate a discharge current during the discharge phase. The discharge circuit further includes means for evacuating the electric charge stored in each circuit node of the charge pump during a corresponding portion of the discharge phase; such means for evacuating include a respective discharge stage for each circuit node of the charge pump. Each discharge stage includes a first discharge circuit branch and a second discharge circuit branch coupled to the corresponding circuit node.

Abstract: A device for programming PCM cells includes a pulse-generator circuit for supplying programming current pulses. The pulse-generator circuit includes: at least one first capacitive element; a charging circuit, connectable to the first capacitive element in a first operating condition, for bringing a reference voltage on the first capacitive element to a reset value; a discharge-current generator, selectively connectable to the first capacitive element in a second operating condition, for discharging the first capacitive element through a controlled discharge current; a logic unit, configured to control connection and disconnection of the first capacitive element), of the charging circuit, and of the discharge-current generator; and a voltage-to-current converter, for converting the reference voltage into current.

Abstract: An embodiment is proposed for trimming a programmable delay line in an integrated device, which delay line is adapted to delay an input signal being synchronous with a synchronization signal of the integrated device—by a total delay. An embodiment of a corresponding method includes the steps of: preliminary programming the delay line to provide a selected nominal value of the total delay equal to a period of the timing signal, and trimming the delay line to vary an actual value of the total delay until the actual value of the total delay matches the period of the synchronization signal.

Abstract: A hierarchical row decoder is for a phase-change memory device provided with an array of memory cells organized according to a plurality of array wordlines and array bitlines. The row decoder has a global decoder that addresses first and a second global wordlines according to first address signals; and a local decoder, which is operatively coupled to the global decoder and addresses a respective array wordline according to the value the first and second global wordline and second address signals. The local decoder has a first circuit branch providing, when the first global wordline is addressed, a first current path between the array wordline and a first biasing source during a reading operation; and a second circuit branch providing, when the second global wordline is addressed, a second current path, distinct from the first current path, between the array wordline and a second biasing source during a programming operation.

Abstract: A sense amplifier for nonvolatile memory cells includes a reference cell, a first load, connected to the reference cell, and a second load, connectable to a nonvolatile memory cell, both the first load and the second load having controllable resistance; a control circuit of the first load and of the second load supplies the first load and the second load with a control voltage irrespective of an operating voltage between a first conduction terminal and a second conduction terminal of the first load.