Abstract: The cascode circuit comprises a plurality of switching transistors (11) to be protected from high voltage and a plurality of cascode transistors (13) connected to the switching transistors (11). A test node (B?) is arranged between each switching transistors (11) and its cascode transistor (13), and a test transistor (30.1-30.n) is allocated to each test node (B?), its gate being connected to the test node (B?). The sources of the test transistors (30.1-30.n) are connected to a first test point (31) and the drains of the test transistors (30.1-30.n) are connected to a second test point (32). A first voltage (U1) is applied to the first test point (31) and a second, slightly lower voltage (U2) is applied to the second test point (32). A current flow detected between the first (31) and the second (32) test point indicates that at least one of the cascode transistors (13) does not work correctly. Thus, the cascode circuit is testable.

Abstract: The cascode circuit comprises a plurality of switching transistors (11) to be protected from high voltage and a plurality of cascode transistors (13) connected to the switching transistors (11). A test node (B?) is arranged between each switching transistor (11) and its cascode transistor (13), and a test transistor (30.1-30.n) is allocated to each test node (B?), its gate being connected to the test node (B?). The sources of the test transistors (30.1-30.n) are connected to a first test point (31) and the drains of the test transistors (30.1-30.n) are connected to a second test point (32). A first voltage (U1) is applied to the first test point (31) and a second, slightly lower voltage (U2) is applied to the second test point (32). A current flow detected between the first (31) and the second (32) test point indicates that at least one of the cascode transistors (13) does not work correctly. Thus, the cascode circuit is testable.

Abstract: The invention relates to a device for driving display devices and to a display device that is provided with a driver circuit. The invention also relates to a method of testing driver circuits. Driver circuits of this kind have a decisive effect on the quality of the display devices. Therefore, in order to ensure a good quality, the driver circuit must be extensively tested, that is, with an as short as possible test time and using as few means as possible. In order to make such a test possible, a device for driving the display devices is provided with M leads that are coupled to AN output stages that are provided with at least one multiplex device (4) and at least one amplifier unit (5), the M leads being coupled to a first switching device (2) that enables the interruption of a voltage supply to the M leads, and at least one second switching device (3) being provided in at least one output stage (AN) in order to switch the output stage (AN) to a selectable potential.

Abstract: The invention relates to a device for driving display devices and to a display device that is provided with a driver circuit. The invention also relates to a method of testing driver circuits. Driver circuits of this kind have a decisive effect on the quality of the display devices. Therefore, in order to ensure a good quality, the driver circuit must be extensively tested, that is, with an as short as possible test time and using as few means as possible. In order to make such a test possible, a device for driving the display devices is provided with M leads that are coupled to AN output stages that are provided with at least one multiplex device (4) and at least one amplifier unit (5), the M leads being coupled to a first switching device (2) that enables the interruption of a voltage supply to the M leads, and at least one second switching device (3) being provided in at least one output stage (AN) in order to switch the output stage (AN) to a selectable potential.

Abstract: Power consumption in driving ICs for electro-optical devices is reduced by driving all pixels in a frame to one extreme state and then introducing intermediate levels (grey-levels, colours) by multiplexing, using a reduced selection pulse width. In this way the number of level transitions for the extreme states and hence power dissipation is reduced.

Abstract: Method of manufacturing the quality of contacts e.g. in an LCD module in which an IC is so placed on the surface of a substrate that the external connections of the IC electrically contact the desired interconnections on the substrate. The quality of the electrical contacts is tested by powering up the IC and running a selftest program. This selftest checks all contacts between the external connections of the device and the interconnections on the substrate, e.g. the row-column conductors on the LCD-glass. Due to a possibly poor ohmic contact the signals from the driver-IC may be delayed, the delay measured being representative for the quality of the contact.

Abstract: By providing an interconnection structure (1) with strip-shaped elevations (11) which, in a plan view, are preferably asterisk-shaped, the contact face is cleaned during compression and an adhesive can easily flow away. The interconnection structure is very suitable for face-down bonding of drive ICs in a display device.