Patents by Inventor Guilherme Tosi
Guilherme Tosi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11978824Abstract: In some embodiments, a light emitting structure comprises a layered semiconductor stack comprising a first set of doped layers, a second layer, a light emitting layer positioned between the first set of doped layers and the second layer, and an electrical contact to the first set of doped layers. The first set of doped layers can comprise a first sub-layer, a second sub-layer, and a third sub-layer, wherein the third sub-layer is adjacent to the light emitting layer. The electrical contact can be coupled to the second sub-layer. The first, second and third sub-layers can be doped n-type, and an electrical conductivity of the second sub-layer can be higher than an electrical conductivity of the first and third sub-layers. The first, second and third sub-layers, the light emitting layer, and the second layer can each comprise a superlattice.Type: GrantFiled: March 21, 2023Date of Patent: May 7, 2024Assignee: Silanna UV Technologies Pte LtdInventors: Johnny Cai Tang, Chun To Lee, Guilherme Tosi, Christopher Flynn, Liam Anderson, Timothy William Bray, Petar Atanackovic
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Publication number: 20240030375Abstract: A semiconductor structure can comprise a plurality of first semiconductor layers comprising wide bandgap semiconductor layers, a narrow bandgap semiconductor layer, and a chirp layer between the plurality of first semiconductor layers and the narrow bandgap semiconductor layer. The values of overlap integrals between different electron wavefunctions in a conduction band of the chirp layer can be less than 0.1 for intersubband transition energies greater than 1.0 eV, and/or the values of overlaps between electron wavefunctions and barrier centers in a conduction band of the chirp layer can be less than 0.4 nm?1, when the structure is biased at an operating potential. The chirp layer can comprise a short-period superlattice with alternating wide bandgap barrier layers and narrow bandgap well layers, wherein the thickness of the barrier layers, or the well layers, or the thickness of both the barrier and well layers changes throughout the chirp layer.Type: ApplicationFiled: October 3, 2023Publication date: January 25, 2024Applicant: Silanna UV Technologies Pte LtdInventors: Norbert Krause, Guilherme Tosi
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Patent number: 11817525Abstract: A semiconductor structure can comprise a plurality of first semiconductor layers comprising wide bandgap semiconductor layers, a narrow bandgap semiconductor layer, and a chirp layer between the plurality of first semiconductor layers and the narrow bandgap semiconductor layer. The values of overlap integrals between different electron wavefunctions in a conduction band of the chirp layer can be less than 0.05 for intersubband transition energies greater than 1.0 eV, and/or the values of overlaps between electron wavefunctions and barrier centers in a conduction band of the chirp layer can be less than 0.3 nm?1, when the structure is biased at an operating potential. The chirp layer can comprise a short-period superlattice with alternating wide bandgap barrier layers and narrow bandgap well layers, wherein the thickness of the barrier layers, or the well layers, or the thickness of both the barrier and well layers changes throughout the chirp layer.Type: GrantFiled: April 8, 2021Date of Patent: November 14, 2023Assignee: Silanna UV Technologies Pte LtdInventors: Norbert Krause, Guilherme Tosi
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Publication number: 20230223491Abstract: In some embodiments, a light emitting structure comprises a layered semiconductor stack comprising a first set of doped layers, a second layer, a light emitting layer positioned between the first set of doped layers and the second layer, and an electrical contact to the first set of doped layers. The first set of doped layers can comprise a first sub-layer, a second sub-layer, and a third sub-layer, wherein the third sub-layer is adjacent to the light emitting layer. The electrical contact can be coupled to the second sub-layer. The first, second and third sub-layers can be doped n-type, and an electrical conductivity of the second sub-layer can be higher than an electrical conductivity of the first and third sub-layers. The first, second and third sub-layers, the light emitting layer, and the second layer can each comprise a superlattice.Type: ApplicationFiled: March 21, 2023Publication date: July 13, 2023Applicant: Silanna UV Technologies Pte LtdInventors: Johnny Cai Tang, Chun To Lee, Guilherme Tosi, Christopher Flynn, Liam Anderson, Timothy William Bray, Petar Atanackovic
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Patent number: 11626535Abstract: In some embodiments, a light emitting structure comprises a layered semiconductor stack comprising a first set of doped layers, a second layer, a light emitting layer positioned between the first set of doped layers and the second layer, and an electrical contact to the first set of doped layers. The first set of doped layers can comprise a first sub-layer, a second sub-layer, and a third sub-layer, wherein the third sub-layer is adjacent to the light emitting layer. The electrical contact can be coupled to the second sub-layer. The first, second and third sub-layers can be doped n-type, and an electrical conductivity of the second sub-layer can be higher than an electrical conductivity of the first and third sub-layers. The first, second and third sub-layers, and the light emitting layer can each comprise a superlattice. The second layer can comprise a chirped superlattice.Type: GrantFiled: April 14, 2022Date of Patent: April 11, 2023Assignee: Silanna UV Technologies Pte LtdInventors: Johnny Cai Tang, Chun To Lee, Guilherme Tosi, Christopher Flynn, Liam Anderson, Timothy William Bray, Petar Atanackovic
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Patent number: 11569408Abstract: In some embodiments, a semiconductor structure comprises a semiconductor layer, a metal layer, and a contact layer adjacent to the metal layer, and between the semiconductor layer and the metal layer. The contact layer can comprise one or more piezoelectric materials comprising spontaneous piezoelectric polarization that depends on material composition and/or strain, and a region comprising a gradient in materials composition and/or strain adjacent to the metal layer. In some embodiments, a light emitting diode (LED) device comprises an n-doped short period superlattice (SPSL) layer, an intrinsically doped AlN/GaN SPSL layer adjacent to the n-doped SPSL layer, a metal layer, and an ohmic-chirp layer between the metal layer and the intrinsically doped AlN/GaN SPSL layer.Type: GrantFiled: December 17, 2020Date of Patent: January 31, 2023Assignee: Silanna UV Technologies Pte LtdInventors: Guilherme Tosi, Norbert Krause
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Publication number: 20220238754Abstract: In some embodiments, a light emitting structure comprises a layered semiconductor stack comprising a first set of doped layers, a second layer, a light emitting layer positioned between the first set of doped layers and the second layer, and an electrical contact to the first set of doped layers. The first set of doped layers can comprise a first sub-layer, a second sub-layer, and a third sub-layer, wherein the third sub-layer is adjacent to the light emitting layer. The electrical contact can be coupled to the second sub-layer. The first, second and third sub-layers can be doped n-type, and an electrical conductivity of the second sub-layer can be higher than an electrical conductivity of the first and third sub-layers. The first, second and third sub-layers, and the light emitting layer can each comprise a superlattice. The second layer can comprise a chirped superlattice.Type: ApplicationFiled: April 14, 2022Publication date: July 28, 2022Applicant: Silanna UV Technologies Pte LtdInventors: Johnny Cai Tang, Chun To Lee, Guilherme Tosi, Christopher Flynn, Liam Anderson, Timothy William Bray, Petar Atanackovic
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Patent number: 11322647Abstract: In some embodiments, a light emitting structure comprises a layered semiconductor stack comprising a first set of doped layers, a second layer, a light emitting layer positioned between the first set of doped layers and the second layer, and an electrical contact to the first set of doped layers. The first set of doped layers can comprise a first sub-layer, a second sub-layer, and a third sub-layer, where the third sub-layer is adjacent to the light emitting layer. The electrical contact to the first set of doped layers can be made to the second sub-layer. The first, second and third sub-layers can be doped n-type, and an electrical conductivity of the second sub-layer can be higher than an electrical conductivity of the first and third sub-layers. In some cases, the second sub-layer can absorb more light emitted from the light emitting layer than the first or third sub-layers.Type: GrantFiled: May 1, 2020Date of Patent: May 3, 2022Assignee: Silanna UV Technologies Pte LtdInventors: Johnny Cai Tang, Chun To Lee, Guilherme Tosi, Christopher Flynn, Liam Anderson, Timothy William Bray, Petar Atanackovic
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Publication number: 20210343896Abstract: In some embodiments, a light emitting structure comprises a layered semiconductor stack comprising a first set of doped layers, a second layer, a light emitting layer positioned between the first set of doped layers and the second layer, and an electrical contact to the first set of doped layers. The first set of doped layers can comprise a first sub-layer, a second sub-layer, and a third sub-layer, where the third sub-layer is adjacent to the light emitting layer. The electrical contact to the first set of doped layers can be made to the second sub-layer. The first, second and third sub-layers can be doped n-type, and an electrical conductivity of the second sub-layer can be higher than an electrical conductivity of the first and third sub-layers. In some cases, the second sub-layer can absorb more light emitted from the light emitting layer than the first or third sub-layers.Type: ApplicationFiled: May 1, 2020Publication date: November 4, 2021Applicant: Silanna UV Technologies Pte LtdInventors: Johnny Cai Tang, Chun To Lee, Guilherme Tosi, Christopher Flynn, Liam Anderson, Timothy William Bray
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Publication number: 20210226082Abstract: A semiconductor structure can comprise a plurality of first semiconductor layers comprising wide bandgap semiconductor layers, a narrow bandgap semiconductor layer, and a chirp layer between the plurality of first semiconductor layers and the narrow bandgap semiconductor layer. The values of overlap integrals between different electron wavefunctions in a conduction band of the chirp layer can be less than 0.05 for intersubband transition energies greater than 1.0 eV, and/or the values of overlaps between electron wavefunctions and barrier centers in a conduction band of the chirp layer can be less than 0.3 nm?1, when the structure is biased at an operating potential. The chirp layer can comprise a short-period superlattice with alternating wide bandgap barrier layers and narrow bandgap well layers, wherein the thickness of the barrier layers, or the well layers, or the thickness of both the barrier and well layers changes throughout the chirp layer.Type: ApplicationFiled: April 8, 2021Publication date: July 22, 2021Applicant: Silanna UV Technologies Pte LtdInventors: Norbert Krause, Guilherme Tosi
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Publication number: 20210143298Abstract: In some embodiments, a semiconductor structure comprises a semiconductor layer, a metal layer, and a contact layer adjacent to the metal layer, and between the semiconductor layer and the metal layer. The contact layer can comprise one or more piezoelectric materials comprising spontaneous piezoelectric polarization that depends on material composition and/or strain, and a region comprising a gradient in materials composition and/or strain adjacent to the metal layer. In some embodiments, a light emitting diode (LED) device comprises an n-doped short period superlattice (SPSL) layer, an intrinsically doped AlN/GaN SPSL layer adjacent to the n-doped SPSL layer, a metal layer, and an ohmic-chirp layer between the metal layer and the intrinsically doped AlN/GaN SPSL layer.Type: ApplicationFiled: December 17, 2020Publication date: May 13, 2021Applicant: Silanna UV Technologies Pte LtdInventors: Guilherme Tosi, Norbert Krause
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Patent number: 10978611Abstract: A semiconductor structure can comprise a plurality of first semiconductor layers comprising wide bandgap semiconductor layers, a narrow bandgap semiconductor layer, and a chirp layer between the plurality of first semiconductor layers and the narrow bandgap semiconductor layer. The values of overlap integrals between different electron wavefunctions in a conduction band of the chirp layer can be less than 0.05 for intersubband transition energies greater than 1.0 eV, and/or the values of overlaps between electron wavefunctions and barrier centers in a conduction band of the chirp layer can be less than 0.3 nm?1, when the structure is biased at an operating potential. The chirp layer can comprise a short-period superlattice with alternating wide bandgap barrier layers and narrow bandgap well layers, wherein the thickness of the barrier layers, or the well layers, or the thickness of both the barrier and well layers changes throughout the chirp layer.Type: GrantFiled: October 2, 2020Date of Patent: April 13, 2021Assignee: Silanna UV Technologies Pte LtdInventors: Norbert Krause, Guilherme Tosi
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Publication number: 20210036183Abstract: A semiconductor structure can comprise a plurality of first semiconductor layers comprising wide bandgap semiconductor layers, a narrow bandgap semiconductor layer, and a chirp layer between the plurality of first semiconductor layers and the narrow bandgap semiconductor layer. The values of overlap integrals between different electron wavefunctions in a conduction band of the chirp layer can be less than 0.05 for intersubband transition energies greater than 1.0 eV, and/or the values of overlaps between electron wavefunctions and barrier centers in a conduction band of the chirp layer can be less than 0.3 nm?1, when the structure is biased at an operating potential. The chirp layer can comprise a short-period superlattice with alternating wide bandgap barrier layers and narrow bandgap well layers, wherein the thickness of the barrier layers, or the well layers, or the thickness of both the barrier and well layers changes throughout the chirp layer.Type: ApplicationFiled: October 2, 2020Publication date: February 4, 2021Applicant: Silanna UV Technologies Pte LtdInventors: Norbert Krause, Guilherme Tosi
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Patent number: 10528884Abstract: The present disclosure provides a method of operation of a quantum processing element and an advanced processing apparatus comprising a plurality of quantum processing elements operated in accordance with the method. Embodiments of the methods disclosed allow using the quantum properties of an MOS structure and a donor atom embedded in the semiconductor to implement electron and nuclear spin qubits and provide multi-qubit coupling, including coupling at longer distances facilitated by a resonator.Type: GrantFiled: May 27, 2016Date of Patent: January 7, 2020Assignee: NewSouth Innovations Pty LimitedInventors: Andrea Morello, Guilherme Tosi, Fahd A. Mohiyaddin
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Publication number: 20180107938Abstract: The present disclosure provides a method of operation of a quantum processing element and an advanced processing apparatus comprising a plurality of quantum processing elements operated in accordance with the method. Embodiments of the methods disclosed allow using the quantum properties of an MOS structure and a donor atom embedded in the semiconductor to implement electron and nuclear spin qubits and provide multi-qubit coupling, including coupling at longer distances facilitated by a resonator.Type: ApplicationFiled: May 27, 2016Publication date: April 19, 2018Inventors: Andrea Morello, Guilherme Tosi, Fahd A. Mohiyaddin