Patents by Inventor Guilherme Tosi

Guilherme Tosi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11978824
    Abstract: In some embodiments, a light emitting structure comprises a layered semiconductor stack comprising a first set of doped layers, a second layer, a light emitting layer positioned between the first set of doped layers and the second layer, and an electrical contact to the first set of doped layers. The first set of doped layers can comprise a first sub-layer, a second sub-layer, and a third sub-layer, wherein the third sub-layer is adjacent to the light emitting layer. The electrical contact can be coupled to the second sub-layer. The first, second and third sub-layers can be doped n-type, and an electrical conductivity of the second sub-layer can be higher than an electrical conductivity of the first and third sub-layers. The first, second and third sub-layers, the light emitting layer, and the second layer can each comprise a superlattice.
    Type: Grant
    Filed: March 21, 2023
    Date of Patent: May 7, 2024
    Assignee: Silanna UV Technologies Pte Ltd
    Inventors: Johnny Cai Tang, Chun To Lee, Guilherme Tosi, Christopher Flynn, Liam Anderson, Timothy William Bray, Petar Atanackovic
  • Publication number: 20240030375
    Abstract: A semiconductor structure can comprise a plurality of first semiconductor layers comprising wide bandgap semiconductor layers, a narrow bandgap semiconductor layer, and a chirp layer between the plurality of first semiconductor layers and the narrow bandgap semiconductor layer. The values of overlap integrals between different electron wavefunctions in a conduction band of the chirp layer can be less than 0.1 for intersubband transition energies greater than 1.0 eV, and/or the values of overlaps between electron wavefunctions and barrier centers in a conduction band of the chirp layer can be less than 0.4 nm?1, when the structure is biased at an operating potential. The chirp layer can comprise a short-period superlattice with alternating wide bandgap barrier layers and narrow bandgap well layers, wherein the thickness of the barrier layers, or the well layers, or the thickness of both the barrier and well layers changes throughout the chirp layer.
    Type: Application
    Filed: October 3, 2023
    Publication date: January 25, 2024
    Applicant: Silanna UV Technologies Pte Ltd
    Inventors: Norbert Krause, Guilherme Tosi
  • Patent number: 11817525
    Abstract: A semiconductor structure can comprise a plurality of first semiconductor layers comprising wide bandgap semiconductor layers, a narrow bandgap semiconductor layer, and a chirp layer between the plurality of first semiconductor layers and the narrow bandgap semiconductor layer. The values of overlap integrals between different electron wavefunctions in a conduction band of the chirp layer can be less than 0.05 for intersubband transition energies greater than 1.0 eV, and/or the values of overlaps between electron wavefunctions and barrier centers in a conduction band of the chirp layer can be less than 0.3 nm?1, when the structure is biased at an operating potential. The chirp layer can comprise a short-period superlattice with alternating wide bandgap barrier layers and narrow bandgap well layers, wherein the thickness of the barrier layers, or the well layers, or the thickness of both the barrier and well layers changes throughout the chirp layer.
    Type: Grant
    Filed: April 8, 2021
    Date of Patent: November 14, 2023
    Assignee: Silanna UV Technologies Pte Ltd
    Inventors: Norbert Krause, Guilherme Tosi
  • Publication number: 20230223491
    Abstract: In some embodiments, a light emitting structure comprises a layered semiconductor stack comprising a first set of doped layers, a second layer, a light emitting layer positioned between the first set of doped layers and the second layer, and an electrical contact to the first set of doped layers. The first set of doped layers can comprise a first sub-layer, a second sub-layer, and a third sub-layer, wherein the third sub-layer is adjacent to the light emitting layer. The electrical contact can be coupled to the second sub-layer. The first, second and third sub-layers can be doped n-type, and an electrical conductivity of the second sub-layer can be higher than an electrical conductivity of the first and third sub-layers. The first, second and third sub-layers, the light emitting layer, and the second layer can each comprise a superlattice.
    Type: Application
    Filed: March 21, 2023
    Publication date: July 13, 2023
    Applicant: Silanna UV Technologies Pte Ltd
    Inventors: Johnny Cai Tang, Chun To Lee, Guilherme Tosi, Christopher Flynn, Liam Anderson, Timothy William Bray, Petar Atanackovic
  • Patent number: 11626535
    Abstract: In some embodiments, a light emitting structure comprises a layered semiconductor stack comprising a first set of doped layers, a second layer, a light emitting layer positioned between the first set of doped layers and the second layer, and an electrical contact to the first set of doped layers. The first set of doped layers can comprise a first sub-layer, a second sub-layer, and a third sub-layer, wherein the third sub-layer is adjacent to the light emitting layer. The electrical contact can be coupled to the second sub-layer. The first, second and third sub-layers can be doped n-type, and an electrical conductivity of the second sub-layer can be higher than an electrical conductivity of the first and third sub-layers. The first, second and third sub-layers, and the light emitting layer can each comprise a superlattice. The second layer can comprise a chirped superlattice.
    Type: Grant
    Filed: April 14, 2022
    Date of Patent: April 11, 2023
    Assignee: Silanna UV Technologies Pte Ltd
    Inventors: Johnny Cai Tang, Chun To Lee, Guilherme Tosi, Christopher Flynn, Liam Anderson, Timothy William Bray, Petar Atanackovic
  • Patent number: 11569408
    Abstract: In some embodiments, a semiconductor structure comprises a semiconductor layer, a metal layer, and a contact layer adjacent to the metal layer, and between the semiconductor layer and the metal layer. The contact layer can comprise one or more piezoelectric materials comprising spontaneous piezoelectric polarization that depends on material composition and/or strain, and a region comprising a gradient in materials composition and/or strain adjacent to the metal layer. In some embodiments, a light emitting diode (LED) device comprises an n-doped short period superlattice (SPSL) layer, an intrinsically doped AlN/GaN SPSL layer adjacent to the n-doped SPSL layer, a metal layer, and an ohmic-chirp layer between the metal layer and the intrinsically doped AlN/GaN SPSL layer.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: January 31, 2023
    Assignee: Silanna UV Technologies Pte Ltd
    Inventors: Guilherme Tosi, Norbert Krause
  • Publication number: 20220238754
    Abstract: In some embodiments, a light emitting structure comprises a layered semiconductor stack comprising a first set of doped layers, a second layer, a light emitting layer positioned between the first set of doped layers and the second layer, and an electrical contact to the first set of doped layers. The first set of doped layers can comprise a first sub-layer, a second sub-layer, and a third sub-layer, wherein the third sub-layer is adjacent to the light emitting layer. The electrical contact can be coupled to the second sub-layer. The first, second and third sub-layers can be doped n-type, and an electrical conductivity of the second sub-layer can be higher than an electrical conductivity of the first and third sub-layers. The first, second and third sub-layers, and the light emitting layer can each comprise a superlattice. The second layer can comprise a chirped superlattice.
    Type: Application
    Filed: April 14, 2022
    Publication date: July 28, 2022
    Applicant: Silanna UV Technologies Pte Ltd
    Inventors: Johnny Cai Tang, Chun To Lee, Guilherme Tosi, Christopher Flynn, Liam Anderson, Timothy William Bray, Petar Atanackovic
  • Patent number: 11322647
    Abstract: In some embodiments, a light emitting structure comprises a layered semiconductor stack comprising a first set of doped layers, a second layer, a light emitting layer positioned between the first set of doped layers and the second layer, and an electrical contact to the first set of doped layers. The first set of doped layers can comprise a first sub-layer, a second sub-layer, and a third sub-layer, where the third sub-layer is adjacent to the light emitting layer. The electrical contact to the first set of doped layers can be made to the second sub-layer. The first, second and third sub-layers can be doped n-type, and an electrical conductivity of the second sub-layer can be higher than an electrical conductivity of the first and third sub-layers. In some cases, the second sub-layer can absorb more light emitted from the light emitting layer than the first or third sub-layers.
    Type: Grant
    Filed: May 1, 2020
    Date of Patent: May 3, 2022
    Assignee: Silanna UV Technologies Pte Ltd
    Inventors: Johnny Cai Tang, Chun To Lee, Guilherme Tosi, Christopher Flynn, Liam Anderson, Timothy William Bray, Petar Atanackovic
  • Publication number: 20210343896
    Abstract: In some embodiments, a light emitting structure comprises a layered semiconductor stack comprising a first set of doped layers, a second layer, a light emitting layer positioned between the first set of doped layers and the second layer, and an electrical contact to the first set of doped layers. The first set of doped layers can comprise a first sub-layer, a second sub-layer, and a third sub-layer, where the third sub-layer is adjacent to the light emitting layer. The electrical contact to the first set of doped layers can be made to the second sub-layer. The first, second and third sub-layers can be doped n-type, and an electrical conductivity of the second sub-layer can be higher than an electrical conductivity of the first and third sub-layers. In some cases, the second sub-layer can absorb more light emitted from the light emitting layer than the first or third sub-layers.
    Type: Application
    Filed: May 1, 2020
    Publication date: November 4, 2021
    Applicant: Silanna UV Technologies Pte Ltd
    Inventors: Johnny Cai Tang, Chun To Lee, Guilherme Tosi, Christopher Flynn, Liam Anderson, Timothy William Bray
  • Publication number: 20210226082
    Abstract: A semiconductor structure can comprise a plurality of first semiconductor layers comprising wide bandgap semiconductor layers, a narrow bandgap semiconductor layer, and a chirp layer between the plurality of first semiconductor layers and the narrow bandgap semiconductor layer. The values of overlap integrals between different electron wavefunctions in a conduction band of the chirp layer can be less than 0.05 for intersubband transition energies greater than 1.0 eV, and/or the values of overlaps between electron wavefunctions and barrier centers in a conduction band of the chirp layer can be less than 0.3 nm?1, when the structure is biased at an operating potential. The chirp layer can comprise a short-period superlattice with alternating wide bandgap barrier layers and narrow bandgap well layers, wherein the thickness of the barrier layers, or the well layers, or the thickness of both the barrier and well layers changes throughout the chirp layer.
    Type: Application
    Filed: April 8, 2021
    Publication date: July 22, 2021
    Applicant: Silanna UV Technologies Pte Ltd
    Inventors: Norbert Krause, Guilherme Tosi
  • Publication number: 20210143298
    Abstract: In some embodiments, a semiconductor structure comprises a semiconductor layer, a metal layer, and a contact layer adjacent to the metal layer, and between the semiconductor layer and the metal layer. The contact layer can comprise one or more piezoelectric materials comprising spontaneous piezoelectric polarization that depends on material composition and/or strain, and a region comprising a gradient in materials composition and/or strain adjacent to the metal layer. In some embodiments, a light emitting diode (LED) device comprises an n-doped short period superlattice (SPSL) layer, an intrinsically doped AlN/GaN SPSL layer adjacent to the n-doped SPSL layer, a metal layer, and an ohmic-chirp layer between the metal layer and the intrinsically doped AlN/GaN SPSL layer.
    Type: Application
    Filed: December 17, 2020
    Publication date: May 13, 2021
    Applicant: Silanna UV Technologies Pte Ltd
    Inventors: Guilherme Tosi, Norbert Krause
  • Patent number: 10978611
    Abstract: A semiconductor structure can comprise a plurality of first semiconductor layers comprising wide bandgap semiconductor layers, a narrow bandgap semiconductor layer, and a chirp layer between the plurality of first semiconductor layers and the narrow bandgap semiconductor layer. The values of overlap integrals between different electron wavefunctions in a conduction band of the chirp layer can be less than 0.05 for intersubband transition energies greater than 1.0 eV, and/or the values of overlaps between electron wavefunctions and barrier centers in a conduction band of the chirp layer can be less than 0.3 nm?1, when the structure is biased at an operating potential. The chirp layer can comprise a short-period superlattice with alternating wide bandgap barrier layers and narrow bandgap well layers, wherein the thickness of the barrier layers, or the well layers, or the thickness of both the barrier and well layers changes throughout the chirp layer.
    Type: Grant
    Filed: October 2, 2020
    Date of Patent: April 13, 2021
    Assignee: Silanna UV Technologies Pte Ltd
    Inventors: Norbert Krause, Guilherme Tosi
  • Publication number: 20210036183
    Abstract: A semiconductor structure can comprise a plurality of first semiconductor layers comprising wide bandgap semiconductor layers, a narrow bandgap semiconductor layer, and a chirp layer between the plurality of first semiconductor layers and the narrow bandgap semiconductor layer. The values of overlap integrals between different electron wavefunctions in a conduction band of the chirp layer can be less than 0.05 for intersubband transition energies greater than 1.0 eV, and/or the values of overlaps between electron wavefunctions and barrier centers in a conduction band of the chirp layer can be less than 0.3 nm?1, when the structure is biased at an operating potential. The chirp layer can comprise a short-period superlattice with alternating wide bandgap barrier layers and narrow bandgap well layers, wherein the thickness of the barrier layers, or the well layers, or the thickness of both the barrier and well layers changes throughout the chirp layer.
    Type: Application
    Filed: October 2, 2020
    Publication date: February 4, 2021
    Applicant: Silanna UV Technologies Pte Ltd
    Inventors: Norbert Krause, Guilherme Tosi
  • Patent number: 10528884
    Abstract: The present disclosure provides a method of operation of a quantum processing element and an advanced processing apparatus comprising a plurality of quantum processing elements operated in accordance with the method. Embodiments of the methods disclosed allow using the quantum properties of an MOS structure and a donor atom embedded in the semiconductor to implement electron and nuclear spin qubits and provide multi-qubit coupling, including coupling at longer distances facilitated by a resonator.
    Type: Grant
    Filed: May 27, 2016
    Date of Patent: January 7, 2020
    Assignee: NewSouth Innovations Pty Limited
    Inventors: Andrea Morello, Guilherme Tosi, Fahd A. Mohiyaddin
  • Publication number: 20180107938
    Abstract: The present disclosure provides a method of operation of a quantum processing element and an advanced processing apparatus comprising a plurality of quantum processing elements operated in accordance with the method. Embodiments of the methods disclosed allow using the quantum properties of an MOS structure and a donor atom embedded in the semiconductor to implement electron and nuclear spin qubits and provide multi-qubit coupling, including coupling at longer distances facilitated by a resonator.
    Type: Application
    Filed: May 27, 2016
    Publication date: April 19, 2018
    Inventors: Andrea Morello, Guilherme Tosi, Fahd A. Mohiyaddin