Patents by Inventor Guillaume C. Ribes

Guillaume C. Ribes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10622460
    Abstract: A vertical transistor includes two portions of a gate conductor that extend within a layer of insulator. An opening extending through the later of insulator includes source, channel and drain regions form by epitaxy operations. A thickness of the portions of the gate conductor decreases in the vicinity of the channel region.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: April 14, 2020
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Alexis Gauthier, Guillaume C. Ribes
  • Publication number: 20190267473
    Abstract: A vertical transistor includes two portions of a gate conductor that extend within a layer of insulator. An opening extending through the later of insulator includes source, channel and drain regions form by epitaxy operations. A thickness of the portions of the gate conductor decreases in the vicinity of the channel region.
    Type: Application
    Filed: May 9, 2019
    Publication date: August 29, 2019
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Alexis GAUTHIER, Guillaume C. RIBES
  • Patent number: 10332982
    Abstract: A vertical transistor includes two portions of a gate conductor that extend within a layer of insulator. An opening extending through the later of insulator includes source, channel and drain regions form by epitaxy operations. A thickness of the portions of the gate conductor decreases in the vicinity of the channel region.
    Type: Grant
    Filed: September 18, 2017
    Date of Patent: June 25, 2019
    Assignee: STMicroelectronics (Crolles 2) SAS
    Inventors: Alexis Gauthier, Guillaume C. Ribes
  • Publication number: 20180277659
    Abstract: A vertical transistor includes two portions of a gate conductor that extend within a layer of insulator. An opening extending through the later of insulator includes source, channel and drain regions form by epitaxy operations. A thickness of the portions of the gate conductor decreases in the vicinity of the channel region.
    Type: Application
    Filed: September 18, 2017
    Publication date: September 27, 2018
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Alexis Gauthier, Guillaume C. Ribes
  • Publication number: 20180090389
    Abstract: An integrated circuit includes FDSOI-type MOS transistors formed inside and on top of a semiconductor layer resting on an insulating layer. The transistors include a logic MOS transistor of a first conductivity type, a logic MOS transistor of a second conductivity type, and an analog MOS transistor of the first conductivity type, A gate stack of the logic transistors successively includes a gate insulator layer, a first titanium nitride layer, a lanthanum layer, and a second titanium nitride layer. A gate stack of the analog transistor includes the gate insulator layer, the lanthanum layer and the second titanium nitride layer but not the first titanium nitride layer.
    Type: Application
    Filed: March 14, 2017
    Publication date: March 29, 2018
    Applicant: STMicroelectronics (Crolles 2) SAS
    Inventors: Guillaume C. Ribes, Benjamin Dumont, Franck Arnaud