Patents by Inventor Guillermo J. Silva
Guillermo J. Silva has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11073891Abstract: A distributed power management system is configured determine a node power consumption of a node during a first time interval. The system can determine a node power cap. The system can determine a proportional component power budget for a component of the node based, at least in part, on the node power consumption and a component power consumption. The system can determine a power budget for the component for a second time interval based, at least in part on the proportional component power budget.Type: GrantFiled: May 10, 2019Date of Patent: July 27, 2021Assignee: International Business Machines CorporationInventors: Alan Drake, Guillermo J. Silva, Timothy G. Hallett, Heather L. Hanson, Jordan Keuseman, Charles R. Lefurgy, Karthick Rajamani, Todd J. Rosedahl, Malcolm S. Allen-Ware
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Patent number: 11029739Abstract: A computer controls power distribution. The computing system determines a power budget for a portion of a topography for a power delivery system. The computing system generates a pool of worker programs for the portion of the topography. The computing system generates a first number of power management tasks to manage power consumption in the portion of the topography based on the power budget. The computing system sends the first number of power management tasks to at least one worker program included in the pool of worker programs.Type: GrantFiled: November 19, 2019Date of Patent: June 8, 2021Assignee: International Business Machines CorporationInventors: Malcolm S. Allen-Ware, Kanak B. Agarwal, Charles Lefurgy, Guillermo J. Silva, Thomas W. Keller, Karthick Rajamani, Yang Li, Ramakrishnan Rajamony
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Publication number: 20200159301Abstract: A computer controls power distribution. The computing system determines a power budget for a portion of a topography for a power delivery system. The computing system generates a pool of worker programs for the portion of the topography. The computing system generates a first number of power management tasks to manage power consumption in the portion of the topography based on the power budget. The computing system sends the first number of power management tasks to at least one worker program included in the pool of worker programs.Type: ApplicationFiled: November 19, 2019Publication date: May 21, 2020Inventors: Malcolm S. Allen-Ware, Kanak B. Agarwal, Charles Lefurgy, Guillermo J. Silva, Thomas W. Keller, Karthick Rajamani, Yang Li, Ramakrishnan Rajamony
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Patent number: 10599207Abstract: A method and apparatus for adjusting a frequency of a processor is disclosed herein. In one embodiment, the method includes inhibiting one or more processor cores from exiting an idle state. The method further includes determining a number of processor cores requesting exit from the idle state and a number of non-idle processor cores. The method also includes selecting a maximum frequency for the inhibited processor cores based on the number of inhibited processor cores requesting exit from the idle state and the number of non-idle processor cores. The method includes setting the maximum frequency for the inhibited processor cores, and then uninhibiting the processor cores requesting exit from the idle state.Type: GrantFiled: December 7, 2017Date of Patent: March 24, 2020Assignee: International Business Machines CorporationInventors: Malcolm S. Allen-Ware, Charles R. Lefurgy, Karthick Rajamani, Todd J. Rosedahl, Guillermo J. Silva, Gregory S. Still, Victor Zyuban
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Patent number: 10571983Abstract: A computer controls power distribution. The computing system determines a topography for a power delivery system that powers a group of computing devices. The computing system determines a number of worker programs for a pool of worker programs based on the topography. The computing system generates the pool of worker programs. The pool of worker programs includes both the number of worker programs and a number of back-up worker programs. The computing system generates a number of power management tasks to manage power consumption through one or more power elements included in the topography of the power delivery system. The computing system sends one or more power management tasks to a worker program included in the pool of worker programs.Type: GrantFiled: June 28, 2017Date of Patent: February 25, 2020Assignee: International Business Machines CorporationInventors: Malcolm S. Allen-Ware, Kanak B. Agarwal, Charles Lefurgy, Guillermo J. Silva, Thomas W. Keller, Karthick Rajamani, Yang Li, Ramakrishnan Rajamony
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Patent number: 10423204Abstract: A mechanism is provided for enforcing power caps within a power consumption device with multiple power supplies. Utilizing a minimum power error value from a set of error values, the minimum power error value is multiplied by a factor k to translate the minimum power error value to an internal power error value. The internal minimum power error value is multiplied by a number of working power supply units (M) of the power consumption device, resulting in an internal minimum power error value for multiple power supply units. The internal minimum power error value for the multiple power supply units is summed with a present power cap value thereby forming a summed power cap value. Responsive to the summed power cap value being between a power cap maximum and a power cap minimum, the computing load is throttled using the summed power cap value.Type: GrantFiled: March 15, 2017Date of Patent: September 24, 2019Assignee: International Business Machines CorporationInventors: Malcolm S. Allen-Ware, Charles R. Lefurgy, Yang Li, Karthick Rajamani, Guillermo J. Silva
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Publication number: 20190272019Abstract: A distributed power management system is configured determine a node power consumption of a node during a first time interval. The system can determine a node power cap. The system can determine a proportional component power budget for a component of the node based, at least in part, on the node power consumption and a component power consumption. The system can determine a power budget for the component for a second time interval based, at least in part on the proportional component power budget.Type: ApplicationFiled: May 10, 2019Publication date: September 5, 2019Inventors: Alan Drake, Guillermo J. Silva, Timothy G. Hallett, Heather L. Hanson, Jordan Keuseman, Charles R. Lefurgy, Karthick Rajamani, Todd J. Rosedahl, Malcolm S. Allen-Ware
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Patent number: 10345888Abstract: A mechanism is provided for power capping power consumption devices with multiple power supplies. A set of power supplies supplying power to a power consumption device having stranded power is determined. A power budget of one or more power supplies in the set of power supplies is adjusted to match a power budget of a power supply in the set of power supplies with a limiting power budget among the power budgets computed for each power supply in the set of power supplies. Responsive to identifying at least one power supply in the one or more other power supplies of one or more different power consumption devices having an initially allocated power budget below their corresponding demand, at least a portion of the stranded power is allocated to the power budget of the at least one power supply.Type: GrantFiled: March 15, 2017Date of Patent: July 9, 2019Assignee: International Business Machines CorporationInventors: Malcolm S. Allen-Ware, Charles R. Lefurgy, Yang Li, Karthick Rajamani, Guillermo J. Silva
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Patent number: 10331192Abstract: A distributed power management system is configured determine a node power consumption of a node during a first time interval. The system can determine a node power cap. The system can determine a proportional component power budget for a component of the node based, at least in part, on the node power consumption and a component power consumption. The system can determine a power budget for the component for a second time interval based, at least in part on the proportional component power budget.Type: GrantFiled: January 13, 2016Date of Patent: June 25, 2019Assignee: International Business Machines CorporationInventors: Alan Drake, Guillermo J. Silva, Timothy G. Hallett, Heather L. Hanson, Jordan Keuseman, Charles R. Lefurgy, Karthick Rajamani, Todd J. Rosedahl, Malcolm S. Allen-Ware
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Publication number: 20190004579Abstract: A computer controls power distribution. The computing system determines a topography for a power delivery system that powers a group of computing devices. The computing system determines a number of worker programs for a pool of worker programs based on the topography. The computing system generates the pool of worker programs. The pool of worker programs includes both the number of worker programs and a number of back-up worker programs. The computing system generates a number of power management tasks to manage power consumption through one or more power elements included in the topography of the power delivery system. The computing system sends one or more power management tasks to a worker program included in the pool of worker programs.Type: ApplicationFiled: June 28, 2017Publication date: January 3, 2019Inventors: Malcolm S. Allen-Ware, Kanak B. Agarwal, Charles Lefurgy, Guillermo J. Silva, Thomas W. Keller, Karthick Rajamani, Yang Li, Ramakrishnan Rajamony
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Publication number: 20180267585Abstract: A mechanism is provided for enforcing power caps within a power consumption device with multiple power supplies. Utilizing a minimum power error value from a set of error values, the minimum power error value is multiplied by a factor k to translate the minimum power error value to an internal power error value. The internal minimum power error value is multiplied by a number of working power supply units (M) of the power consumption device, resulting in an internal minimum power error value for multiple power supply units. The internal minimum power error value for the multiple power supply units is summed with a present power cap value thereby forming a summed power cap value. Responsive to the summed power cap value being between a power cap maximum and a power cap minimum, the computing load is throttled using the summed power cap value.Type: ApplicationFiled: March 15, 2017Publication date: September 20, 2018Inventors: Malcolm S. Allen-Ware, Charles R. Lefurgy, Yang Li, Karthick Rajamani, Guillermo J. Silva
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Publication number: 20180267597Abstract: A mechanism is provided for power capping power consumption devices with multiple power supplies. A set of power supplies supplying power to a power consumption device having stranded power is determined. A power budget of one or more power supplies in the set of power supplies is adjusted to match a power budget of a power supply in the set of power supplies with a limiting power budget among the power budgets computed for each power supply in the set of power supplies. Responsive to identifying at least one power supply in the one or more other power supplies of one or more different power consumption devices having an initially allocated power budget below their corresponding demand, at least a portion of the stranded power is allocated to the power budget of the at least one power supply.Type: ApplicationFiled: March 15, 2017Publication date: September 20, 2018Inventors: Malcolm S. Allen-Ware, Charles R. Lefurgy, Yang Li, Karthick Rajamani, Guillermo J. Silva
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Publication number: 20180101217Abstract: A method and apparatus for adjusting a frequency of a processor is disclosed herein. In one embodiment, the method includes inhibiting one or more processor cores from exiting an idle state. The method further includes determining a number of processor cores requesting exit from the idle state and a number of non-idle processor cores. The method also includes selecting a maximum frequency for the inhibited processor cores based on the number of inhibited processor cores requesting exit from the idle state and the number of non-idle processor cores. The method includes setting the maximum frequency for the inhibited processor cores, and then uninhibiting the processor cores requesting exit from the idle state.Type: ApplicationFiled: December 7, 2017Publication date: April 12, 2018Inventors: Malcolm S. ALLEN-WARE, Charles R. LEFURGY, Karthick RAJAMANI, Todd J. ROSEDAHL, Guillermo J. SILVA, Gregory S. STILL, Victor ZYUBAN
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Patent number: 9933836Abstract: A method for adjusting a frequency of a processor is disclosed herein. In one embodiment, the method includes inhibiting one or more processor cores from exiting an idle state. The method further includes determining a number of processor cores requesting exit from the idle state and a number of non-idle processor cores. The method also includes selecting a maximum frequency for the inhibited and non-idle processor cores based on the number of inhibited processor cores requesting exit from the idle state and the number of non-idle processor cores. The method includes setting the maximum frequency for both the inhibited and the non-idle processor cores, and then uninhibiting the processor cores requesting exit from the idle state.Type: GrantFiled: August 24, 2015Date of Patent: April 3, 2018Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Malcolm S. Allen-Ware, Charles R. Lefurgy, Karthick Rajamani, Todd J. Rosedahl, Guillermo J. Silva, Gregory S. Still, Victor Zyuban
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Patent number: 9880599Abstract: A mechanism is provided for throttling power utilized by a set of power consumption devices using priority-aware power capping. Responsive to unassigned power budget remaining in the overall power budget after a minimum power budget value has been assigned to the child device based on an associated priority of the child device, an additional power budget value equal to a remaining priority-based exposed power demand value of the child device is assigned to the child device in response to the remaining unassigned power budget being greater than or equal to the remaining priority-based demanded power value thereby forming a total power budget for the child device. Responsive to design limitations of power distribution equipment in the data processing system or contractual limits of the data processing system being reached, a throttling is implemented by each child device based on the total power budget assigned to the child device.Type: GrantFiled: October 12, 2016Date of Patent: January 30, 2018Assignee: International Business Machines CorporationInventors: Malcolm S. Allen-Ware, Thomas W. Keller, Jr., Charles R. Lefurgy, Yang Li, Karthick Rajamani, Samuel W. Shanks, Guillermo J. Silva, Eddie L. Smith, James Yanes
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Patent number: 9746909Abstract: It is determined that a current node power consumption for a node is greater than a node power cap that defines a limit of power consumption for the node. Responsive to the current node power consumption being greater than the node power cap and until the current node power consumption is less than the node power cap, power reduction operations are performed. The power reduction operations comprise determining a power management zone of a plurality of power management zones having a lowest priority among the power management zones and having a power cap greater than a minimum power cap for the power management zone. The power reduction operations further comprise setting the power cap for the power management zone to a value less than a prior value assigned as the power cap for the power management zone.Type: GrantFiled: February 25, 2014Date of Patent: August 29, 2017Assignee: International Business Machines CorporationInventors: Malcolm S. Allen-Ware, Martha A. Broyles, Timothy G. Hallett, James D. Jordan, Jordan R. Keuseman, Benjamin W. Mashak, Glenn R. Miles, Todd J. Rosedahl, Guillermo J Silva
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Patent number: 9740275Abstract: It is determined that a current node power consumption for a node is greater than a node power cap that defines a limit of power consumption for the node. Responsive to the current node power consumption being greater than the node power cap and until the current node power consumption is less than the node power cap, power reduction operations are performed. The power reduction operations comprise determining a power management zone of a plurality of power management zones having a lowest priority among the power management zones and having a power cap greater than a minimum power cap for the power management zone. The power reduction operations further comprise setting the power cap for the power management zone to a value less than a prior value assigned as the power cap for the power management zone.Type: GrantFiled: June 23, 2014Date of Patent: August 22, 2017Assignee: International Business Machines CorporationInventors: Malcolm S. Allen-Ware, Martha A. Broyles, Timothy G. Hallett, James D. Jordan, Jordan R. Keuseman, Benjamin W. Mashak, Glenn R. Miles, Todd J. Rosedahl, Guillermo J Silva
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Patent number: 9684366Abstract: A zone power cap for a power management zone that defines a limit of power consumption for the power management zone is determined. The power management zone comprises a plurality of components, wherein the power management zone is associated with a controller. A set of one or more characteristics of a workload associated with the power management zone is determined. A component power cap for one or more of the plurality of components is set based, at least in part, on the set of one or more characteristics of the workload and the zone power cap.Type: GrantFiled: June 23, 2014Date of Patent: June 20, 2017Assignee: International Business Machines CorporationInventors: Malcolm S. Allen-Ware, Martha A. Broyles, Timothy G. Hallett, James D. Jordan, Jordan R. Keuseman, Benjamin W. Mashak, Glenn R. Miles, Todd J. Rosedahl, Guillermo J Silva
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Patent number: 9568982Abstract: A system for adjusting a frequency of a processor is disclosed herein. The system includes a processor and a memory. The memory stores program code, which, when executed on the processor, performs an operation for adjusting a frequency of a processor. The operation includes inhibiting one or more processor cores from exiting an idle state. The operation further includes determining a number of processor cores requesting exit from the idle state and a number of non-idle processor cores. The operation also includes selecting a maximum frequency for the inhibited and non-idle processor cores based on the number of inhibited processor cores requesting exit from the idle state and the number of non-idle processor cores. The operation includes setting the maximum frequency for both the inhibited and the non-idle processor cores, and then uninhibiting the processor cores requesting exit from the idle state.Type: GrantFiled: July 31, 2015Date of Patent: February 14, 2017Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Malcolm S. Allen-Ware, Charles R. Lefurgy, Karthick Rajamani, Todd J. Rosedahl, Guillermo J. Silva, Gregory S. Still, Victor Zyuban
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Publication number: 20170031427Abstract: A system for adjusting a frequency of a processor is disclosed herein. The system includes a processor and a memory. The memory stores program code, which, when executed on the processor, performs an operation for adjusting a frequency of a processor. The operation includes inhibiting one or more processor cores from exiting an idle state. The operation further includes determining a number of processor cores requesting exit from the idle state and a number of non-idle processor cores. The operation also includes selecting a maximum frequency for the inhibited and non-idle processor cores based on the number of inhibited processor cores requesting exit from the idle state and the number of non-idle processor cores. The operation includes setting the maximum frequency for both the inhibited and the non-idle processor cores, and then uninhibiting the processor cores requesting exit from the idle state.Type: ApplicationFiled: July 31, 2015Publication date: February 2, 2017Inventors: Malcolm S. ALLEN-WARE, Charles R. LEFURGY, Karthick RAJAMANI, Todd J. ROSEDAHL, Guillermo J. SILVA, Gregory S. STILL, Victor ZYUBAN