Abstract: An integrated thermoelectric generator of out-of-plane heat flux configuration can be fabricated with a process fully compatible with standard front-end CMOS or BiCMOS technologies, if portions of the planar electrically non conductive cover layer suspended over the valleys have sufficiently large through holes to let isotropic etching solutions or etching plasma pass therethrough, across the thickness of the non conductive cover layer, so as to realize void spaces. The generator has a top capping layer deposited onto a free surface, oriented in an opposite direction in respect to the void spaces, of the planar electrically non conductive cover layer so as to occlude the through holes of the non conductive cover layer. A method of fabricating an integrated thermoelectric generator of out-of-plane heat flux configuration is also disclosed.