Abstract: Embodiments of the present invention provide a security information configuration method, so as to reduce costs, simplify a security information configuration process, and improve security and reliability of security information configuration. The security information configuration method provided in the embodiments of the present invention includes: generating, by an SoC, an asymmetric key pair; writing a private key into an eFuse of the SoC; encrypting a public key; writing the encrypted public key into a flash memory for storage; generating first digest information according to target software information; making a signature for the first digest information, so as to obtain signature information; and writing the signature information into the flash memory. The embodiments of the present invention further provide a related security verification method and a related chip.

Abstract: Embodiments of the present invention provide a security information configuration method, so as to reduce costs, simplify a security information configuration process, and improve security and reliability of security information configuration. The security information configuration method provided in the embodiments of the present invention includes: generating, by an SoC, an asymmetric key pair; writing a private key into an eFuse of the SoC; encrypting a public key; writing the encrypted public key into a flash memory for storage; generating first digest information according to target software information; making a signature for the first digest information, so as to obtain signature information; and writing the signature information into the flash memory. The embodiments of the present invention further provide a related security verification method and a related chip.