Patents by Inventor Gun-Joong Lee

Gun-Joong Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9312124
    Abstract: A method of fabricating a semiconductor device may include: forming a field region defining an active region in a substrate; forming a gate trench in which the active and field regions are partially exposed; forming a gate insulating layer on a surface of the active region; conformally forming a gate barrier layer including metal on the gate insulating layer and partially exposed field region; forming a gate electrode layer including metal on the gate barrier layer; and/or forming a gate capping layer. Forming the gate insulating layer may include forming a first gate oxide layer by primarily oxidizing the active region's surface, and forming a second gate oxide layer between the active region's surface and the first gate oxide layer by secondarily oxidizing the active region's surface. The gate capping layer may be in contact with the gate insulating layer, gate barrier layer, and/or gate electrode layer.
    Type: Grant
    Filed: September 6, 2012
    Date of Patent: April 12, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Tai-Su Park, Gun-Joong Lee, Young-Dong Lee, Sang-Chul Han, Joo-Byoung Yoon
  • Patent number: 8691649
    Abstract: In methods of manufacturing a recessed channel array transistor, a recess may be formed in an active region of a substrate. A plasma oxidation process may be performed on the substrate to form a preliminary gate oxide layer on an inner surface of the recess and an upper surface of the substrate. Moistures may be absorbed in a surface of the preliminary gate oxide layer to form a gate oxide layer. A gate electrode may be formed on the gate oxide layer to fill up the recess. Source/drain regions may be formed in an upper surface of the substrate at both sides of the gate electrode. Thus, the oxide layer may have a uniform thickness distribution and a dense structure.
    Type: Grant
    Filed: June 2, 2011
    Date of Patent: April 8, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Tai-Su Park, Jung-Sup Oh, Gun-Joong Lee, Jung-Soo An, Dong-Kyu Lee, Jung-Geun Park, Jeong-Do Ryu, Dong-Chan Kim, Seong-Hoon Jeong, Si-Young Choi, Yu-Gyun Shin, Jong-Ryeol Yoo, Jong-Hoon Kang
  • Publication number: 20130164919
    Abstract: A method of fabricating a semiconductor device may include forming active and field regions in a substrate; forming a gate trench in which the active and field regions are exposed; forming a gate insulating layer on a surface of the exposed active region, wherein forming the gate insulating layer includes forming a first gate oxide layer by primarily oxidizing the surface of the active region, and forming a second gate oxide layer between the surface of the active region and the first gate oxide layer by secondarily oxidizing the surface of the active region; conformally forming a gate barrier layer on the gate insulating layer and the exposed field region; forming a gate electrode layer on the gate barrier layer; and forming a gate capping layer in contact with the gate insulating layer, the gate barrier layer, and the gate electrode layer in the gate trench.
    Type: Application
    Filed: September 6, 2012
    Publication date: June 27, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Tai-Su PARK, Gun-Joong LEE, Young-Dong LEE, Sang-Chul HAN, Joo-Byoung YOON
  • Publication number: 20110237037
    Abstract: In methods of manufacturing a recessed channel array transistor, a recess may be formed in an active region of a substrate. A plasma oxidation process may be performed on the substrate to form a preliminary gate oxide layer on an inner surface of the recess and an upper surface of the substrate. Moistures may be absorbed in a surface of the preliminary gate oxide layer to form a gate oxide layer. A gate electrode may be formed on the gate oxide layer to fill up the recess. Source/drain regions may be formed in an upper surface of the substrate at both sides of the gate electrode. Thus, the oxide layer may have a uniform thickness distribution and a dense structure.
    Type: Application
    Filed: June 2, 2011
    Publication date: September 29, 2011
    Inventors: Tai-Su Park, Jung-Sup Oh, Gun-Joong Lee, Jung-Soo An, Dong-Kyu Lee, Jung-Geun Park, Jeong-Do Ryu, Dong-Chan Kim, Seong-Hoon Jeong, Si-Young Choi, Yu-Gyun Shin, Jong-Ryeol Yoo, Jong-Hoon Kang