Patents by Inventor Gunasekaran Natarajan

Gunasekaran Natarajan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of manufacturing semiconductor devices using a bond program verification system
    Patent number: 7029929
    Abstract: A method for checking a wire bonding recipe is provided. Generally, coordinate data of a master recipe is stored. Coordinate data of a slave recipe is stored. The coordinate data of the slave recipe is compared with coordinate data of the master recipe. An error signal is provided if a mismatch is found between the coordinate data of the slave recipe and the coordinate data of the master recipe. A computer readable medium containing program instructions for checking a wire bonding recipe is also provided. The program contains computer readable code for storing coordinate data of a master recipe, computer readable code for storing coordinate data of a slave recipe, computer readable code for comparing the coordinate data of the slave recipe with coordinate data of the master recipe, and computer readable code for providing an error signal if a mismatch is found between the coordinate data of the slave recipe and the coordinate data of the master recipe.
    Type: Grant
    Filed: July 22, 2004
    Date of Patent: April 18, 2006
    Assignee: National Semiconductor Corporation
    Inventors: Qin Lu, Soo Yeow Heng, Tian Han Lim, Gunasekaran Natarajan, Eng Seng Ong
  • Bond program verification system
    Patent number: 6789235
    Abstract: A method for checking a wire bonding recipe is provided. Generally, coordinate data of a master recipe is stored. Coordinate data of a slave recipe is stored. The coordinate data of the slave recipe is compared with coordinate data of the master recipe. An error signal is provided if a mismatch is found between the coordinate data of the slave recipe and the coordinate data of the master recipe. A computer readable medium containing program instructions for checking a wire bonding recipe is also provided. The program contains computer readable code for storing coordinate data of a master recipe, computer readable code for storing coordinate data of a slave recipe, computer readable code for comparing the coordinate data of the slave recipe with coordinate data of the master recipe, and computer readable code for providing an error signal if a mismatch is found between the coordinate data of the slave recipe and the coordinate data of the master recipe.
    Type: Grant
    Filed: September 5, 2001
    Date of Patent: September 7, 2004
    Assignee: National Semiconductor Corporation
    Inventors: Qin Lu, Soo Yeow Heng, Tian Han Lim, Gunasekaran Natarajan, Eng Seng Ong