Patents by Inventor GunHyuck Lee
GunHyuck Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240088060Abstract: A semiconductor device has a first substrate and a first electrical component disposed over the first substrate. A first support frame is disposed over the first substrate. The first support frame has a horizontal support channel extending across the first substrate and a vertical support brace extending from the horizontal support channel to the first substrate. The first support frame can have a vertical shielding partition extending from the horizontal support channel to the first substrate. An encapsulant is deposited over the first electrical component and first substrate and around the first support frame. A second electrical component is disposed over the first electrical component. A second substrate is disposed over the first support frame. A second electrical component is disposed over the second substrate. A third substrate is disposed over the second substrate. A second support frame is disposed over the second substrate.Type: ApplicationFiled: November 22, 2023Publication date: March 14, 2024Applicant: STATS ChipPAC Pte. Ltd.Inventor: GunHyuck Lee
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Publication number: 20240063194Abstract: A semiconductor device has a first semiconductor package, second semiconductor package, and RDL. The first semiconductor package is disposed over a first surface of the RDL and the second semiconductor package is disposed over a second surface of the RDL opposite the first surface of the RDL. A carrier is initially disposed over the second surface of the RDL and removed after disposing the first semiconductor package over the first surface of the RDL. The first semiconductor package has a substrate, plurality of conductive pillars formed over the substrate, electrical component disposed over the substrate, and encapsulant deposited around the conductive pillars and electrical component. A shielding frame can be disposed around the electrical component. An antenna can be disposed over the first semiconductor package. A portion of the encapsulant is removed to planarize a surface of the encapsulant and expose the conductive pillars.Type: ApplicationFiled: August 17, 2022Publication date: February 22, 2024Applicant: STATS ChipPAC Pte. Ltd.Inventors: GunHyuck Lee, Yujeong Jang, Gayeun Kim, YoungUk Noh
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Patent number: 11869848Abstract: A semiconductor device has a first substrate and a first electrical component disposed over the first substrate. A first support frame is disposed over the first substrate. The first support frame has a horizontal support channel extending across the first substrate and a vertical support brace extending from the horizontal support channel to the first substrate. The first support frame can have a vertical shielding partition extending from the horizontal support channel to the first substrate. An encapsulant is deposited over the first electrical component and first substrate and around the first support frame. A second electrical component is disposed over the first electrical component. A second substrate is disposed over the first support frame. A second electrical component is disposed over the second substrate. A third substrate is disposed over the second substrate. A second support frame is disposed over the second substrate.Type: GrantFiled: August 11, 2021Date of Patent: January 9, 2024Assignee: STATS ChipPAC Pte. Ltd.Inventor: GunHyuck Lee
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Publication number: 20230395477Abstract: A semiconductor device has an interconnect substrate with a conductive via. A first electrical component is disposed over a major surface of the interconnect substrate. An electrical interconnect compound is disposed over the conductive via exposed from a side surface of the interconnect substrate. The electrical interconnect compound can be applied with a tilt nozzle oriented at an angle. A second electrical component is disposed on the electrical interconnect compound on the conductive via exposed from the side surface of the interconnect substrate. A plurality of second electrical components can be disposed on two or more side surfaces of the interconnect substrate. The interconnect substrate can have a plurality of stacked conductive vias and the second electrical component is disposed over the stacked conductive vias. An encapsulant is deposited over the first electrical component and interconnect substrate. A shielding layer can be formed over the encapsulant.Type: ApplicationFiled: June 2, 2022Publication date: December 7, 2023Applicant: STATS ChipPAC Pte. Ltd.Inventors: GunHyuck Lee, HeeSoo Lee, SangHyun Son, Bokyeong Hwang
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Publication number: 20230386888Abstract: A method for making semiconductor devices includes: attaching a substrate with a plurality of electronic components onto a composite tape having an adhesive layer which is sensitive to ultraviolet (UV) irradiation and a UV-transparent base film, wherein the substrate is attached onto the adhesive layer of the composite tape; placing the substrate and the composite tape on a UV-transparent carrier, wherein the UV-transparent carrier is in contact with the UV-transparent base film of the composite tape; singulating the substrate into a plurality of semiconductor devices each having one of the plurality of electronic components; depositing a shielding material on the plurality of semiconductor devices to form a shielding layer on each of the plurality of semiconductor devices; irradiating a UV light to the composite tape through the UV-transparent carrier to reduce adhesivity of the adhesive layer; and detaching the plurality of semiconductor devices from the UV-transparent carrier.Type: ApplicationFiled: May 15, 2023Publication date: November 30, 2023Inventors: GunHyuck LEE, Yujeong JANG
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Publication number: 20230378088Abstract: An apparatus for selectively forming a shielding layer on a semiconductor package is provided. The apparatus includes: a tray including a plurality of package seats, the tray defines, for each of the plurality of package seats, one or more sets of guide holes outside the package seat; deposition masks, each of the deposition masks includes: a set of pins releasably inserted within one set of the one or more sets of guide holes to place the deposition mask on the tray; and a cover attached to the set of pins, the cover is configured to cover at least a portion of an outer surface of a semiconductor package received within a package seat when the set of pins is inserted within the set of guide holes associated with the package seat; and a deposition source configured to deposit a shielding material.Type: ApplicationFiled: May 10, 2023Publication date: November 23, 2023Inventors: GunHyuck LEE, Yujeong JANG
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Publication number: 20230343717Abstract: An interconnect device comprises an insulating frame. The insulating frame comprises: a top insulating layer formed uppermost of the insulating frame and occupying an entirety of a top surface of the insulating frame; a bottom insulating layer formed lowermost of the insulating frame and occupying an entirety of a bottom surface of the insulating frame; and a central insulating layer that includes a plurality of insulators disposed between the top insulating layer and the bottom insulating layer, wherein the plurality of insulators form a plurality of through-holes between a first lateral surface and a second lateral surface of the central insulating layer. The interconnect device further comprises a plurality of bridge conductors, wherein each of the plurality of bridge conductors is disposed within a respective one of the plurality of through-holes and extends between the first lateral surface and the second lateral surface of the central insulating layer.Type: ApplicationFiled: April 19, 2023Publication date: October 26, 2023Inventors: GunHyuck LEE, SangHyun SON
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Publication number: 20230238376Abstract: A semiconductor device has a first semiconductor package including a substrate and an encapsulant deposited over the substrate. An adhesive tape is disposed on the encapsulant. A conductive via is formed by trench cutting through the adhesive tape and encapsulant to expose the substrate. A second semiconductor package is disposed over the adhesive tape opposite the first semiconductor package. The first semiconductor package and second semiconductor package are bonded together by the adhesive tape.Type: ApplicationFiled: January 26, 2022Publication date: July 27, 2023Applicant: STATS ChipPAC Pte. Ltd.Inventors: GunHyuck Lee, SangHyun Son, Yujeong Jang, Hyeoneui Lee
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Publication number: 20230215813Abstract: A semiconductor device is made by providing a strip substrate including a plurality of units. A hole is formed in the strip substrate. An encapsulant is deposited over the strip substrate. A mask is disposed over the strip substrate and encapsulant with a leg of the mask disposed in the hole. A shielding layer is formed over the mask and strip substrate. The mask is removed after forming the shielding layer. The strip substrate is singulated to separate the plurality of units from each other after forming the shielding layer.Type: ApplicationFiled: January 5, 2022Publication date: July 6, 2023Applicant: STATS ChipPAC Pte. Ltd.Inventors: GunHyuck Lee, HyunKyu Lee, MinJung Kim
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Publication number: 20230050884Abstract: A semiconductor device has a first substrate and a first electrical component disposed over the first substrate. A first support frame is disposed over the first substrate. The first support frame has a horizontal support channel extending across the first substrate and a vertical support brace extending from the horizontal support channel to the first substrate. The first support frame can have a vertical shielding partition extending from the horizontal support channel to the first substrate. An encapsulant is deposited over the first electrical component and first substrate and around the first support frame. A second electrical component is disposed over the first electrical component. A second substrate is disposed over the first support frame. A second electrical component is disposed over the second substrate. A third substrate is disposed over the second substrate. A second support frame is disposed over the second substrate.Type: ApplicationFiled: August 11, 2021Publication date: February 16, 2023Applicant: STATS ChipPAC Pte. Ltd.Inventor: GunHyuck Lee