Patents by Inventor Gunner Danneels
Gunner Danneels has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240013232Abstract: The present application relates to devices and components including apparatus, systems, and methods to provide object story data structures.Type: ApplicationFiled: August 24, 2021Publication date: January 11, 2024Applicant: The Provenance Chain Network, Inc.Inventors: Daniel McMorris, Jeffrey W. Gaus, Lindsay Nelson, Ketan Sampat, Gunner Danneels
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Publication number: 20230325753Abstract: The present application relates to devices and components including apparatus, systems, and methods to provide object story data structures.Type: ApplicationFiled: August 24, 2021Publication date: October 12, 2023Applicant: The Provenance Chain Network, Inc.Inventors: Ketan Sampat, Jeffrey W. Gaus, Daniel McMorris, Lindsay Nelson, Gunner Danneels
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Publication number: 20230306442Abstract: The present application relates to devices and components including apparatus, systems, and methods to provide object story data structures.Type: ApplicationFiled: August 24, 2021Publication date: September 28, 2023Applicant: The Provenance Chain Network, Inc.Inventors: Lindsay Nelson, Jeffrey W. Gaus, Daniel McMorris, Ketan Sampat, Gunner Danneels
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Publication number: 20230305538Abstract: The present application relates to devices and components including apparatus, systems, and methods to provide object story data structures.Type: ApplicationFiled: August 24, 2021Publication date: September 28, 2023Applicant: The Provenance Chain Network, Inc.Inventors: Jeffrey W. Gaus, Daniel McMorris, Lindsay Nelson, Ketan Sampat, Gunner Danneels
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Publication number: 20130346664Abstract: A computing system is described that includes a main system bus that remains active while said computing system operates within a non main CPU/OS based operational state. The computing system also includes a controller that operates functional tasks while the computing system is within the non main CPU/OS based operational state. The computing system also includes an I/O unit coupled to the main system bus that remains active while the computing system operates within the non main CPU/OS based operational state.Type: ApplicationFiled: August 27, 2013Publication date: December 26, 2013Inventors: James P. Kardach, Brian V. Belmont, Muthu K. Kumar, Riley W. Jackson, Gunner Danneels, Richard A. Forand, Vivek Gupta, Jeffrey L. Huckins, Kristoffer D. Flemming, Uma M. Gadamsetty
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Patent number: 8522063Abstract: A computing system is described that includes a main system bus that remains active while said computing system operates within a non main CPU/OS based operational state. The computing system also includes a controller that operates functional tasks while the computing system is within the non main CPU/OS based operational state. The computing system also includes an I/O unit coupled to the main system bus that remains active while the computing system operates within the non main CPU/OS based operational state.Type: GrantFiled: April 24, 2012Date of Patent: August 27, 2013Assignee: Intel CorporationInventors: James P. Kardach, Brian V. Belmont, Muthu K. Kumar, Riley W. Jackson, Gunner Danneels, Richard A. Forand, Vivek Gupta, Jeffrey L. Huckins, Kristoffer D. Flemming, Uma M. Gadamsetty
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Publication number: 20120210036Abstract: A computing system is described that includes a main system bus that remains active while said computing system operates within a non main CPU/OS based operational state. The computing system also includes a controller that operates functional tasks while the computing system is within the non main CPU/OS based operational state. The computing system also includes an I/O unit coupled to the main system bus that remains active while the computing system operates within the non main CPU/OS based operational state.Type: ApplicationFiled: April 24, 2012Publication date: August 16, 2012Inventors: James P. Kardach, Brian V. Belmont, Muthu K. Kumar, Riley W. Jackson, Gunner Danneels, Richard A. Forand, Vivek Gupta, Jeffrey L. Huckins, Kristoffer D. Flemming, Uma M. Gadamsetty
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Patent number: 8166325Abstract: A computing system is described that includes a main system bus that remains active while said computing system operates within a non main CPU/OS based operational state. The computing system also includes a controller that operates functional tasks while the computing system is within the non main CPU/OS based operational state. The computing system also includes an I/O unit coupled to the main system bus that remains active while the computing system operates within the non main CPU/OS based operational state.Type: GrantFiled: September 22, 2008Date of Patent: April 24, 2012Assignee: Intel CorporationInventors: James P. Kardach, Brian V. Belmont, Muthu K. Kumar, Riley W. Jackson, Gunner Danneels, Richard A. Forand, Vivek Gupta, Jeffrey L. Huckins, Kristoffer D. Flemming, Uma M. Gadamsetty
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Publication number: 20120066715Abstract: Video sources may be located on the Internet and particular videos at those sources may be selected for subsequent replay by using graphical controls provided, for example, in connection with a browser. These controls may permit the use of select, particular video segments for subsequent replay by adding them to a playlist. Then when the user has assembled the playlist in the order desired, the play of the playlist can be selected. The playlist video may then be displayed for the user on a remote display, such as a high definition television display. At the same time, the user's computer screen may display a control view which allows the user to view and add annotations and to control the play of a video on the high definition television screen.Type: ApplicationFiled: December 21, 2010Publication date: March 15, 2012Inventors: Shashi K. Jain, Prashant Gandhi, James P. Melican, Rita H. Wouhaybi, Mark D. Yarvis, Gunner Danneels
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Publication number: 20090019185Abstract: A computing system is described that includes a main system bus that remains active while said computing system operates within a non main CPU/OS based operational state. The computing system also includes a controller that operates functional tasks while the computing system is within the non main CPU/OS based operational state. The computing system also includes an I/O unit coupled to the main system bus that remains active while the computing system operates within the non main CPU/OS based operational state.Type: ApplicationFiled: September 22, 2008Publication date: January 15, 2009Inventors: James P. Kardach, Brian V. Belmont, Muthu K. Kumar, Riley W. Jackson, Gunner Danneels, Richard A. Forand, Vivek Gupta, Jeffrey L. Huckins, Kristoffer D. Flemming, Uma M. Gadamsetty
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Patent number: 7428650Abstract: A computing system is described that includes a main system bus that remains active while said computing system operates within a non main CPU/OS based operational state. The computing system also includes a controller that operates functional tasks while the computing system is within the non main CPU/OS based operational state. The computing system also includes an I/O unit coupled to the main system bus that remains active while the computing system operates within the non main CPU/OS based operational state.Type: GrantFiled: May 15, 2006Date of Patent: September 23, 2008Assignee: Intel CorporationInventors: James P. Kardach, Brian V. Belmont, Muthu K. Kumar, Riley W. Jackson, Gunner Danneels, Richard A. Forand, Vivek Gupta, Jeffrey L. Huckins, Kristoffer D. Flemming, Uma M. Gadamsetty
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Patent number: 7421597Abstract: A method is described that involves operating a computing system within a normal on state and transitioning from the normal on state to a main CPU/OS based state. In the main CPU/OS based state one or more components of the computing system are inactivated so as to cause the computing system to consume less power in the main CPU/OS based state than in the normal on state. The computing system is able to execute software application routines on a main CPU and a main OS of the computing system while in the main CPU/OS based state.Type: GrantFiled: October 28, 2005Date of Patent: September 2, 2008Assignee: Intel CorporationInventors: James P. Kardach, Jeffrey L. Huckins, Kristoffer D. Fleming, Uma M. Gadamsetty, Vivek Gupta, Brian V. Belmont, Muthu K. Kumar, Riley W. Jackson, Gunner Danneels, Richard A. Forand
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Patent number: 7406610Abstract: A method is described that involves operating a computing system within a normal on state and transitioning from the normal on state to a main CPU/OS based state. In the main CPU/OS based state one or more components of the computing system are inactivated so as to cause the computing system to consume less power in the main CPU/OS based state than in the normal on state. The computing system is able to execute software application routines on a main CPU and a main OS of the computing system while in the main CPU/OS based state.Type: GrantFiled: October 28, 2005Date of Patent: July 29, 2008Assignee: Intel CorporationInventors: James P. Kardach, Jeffrey L. Huckins, Kristoffer D. Fleming, Uma M. Gadamsetty, Vivek Gupta, Brian V. Belmont, Muthu K. Kumar, Riley W. Jackson, Gunner Danneels, Richard A. Forand
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Patent number: 7254730Abstract: A method and apparatus for a user to interface with a mobile computing device is disclosed.Type: GrantFiled: February 14, 2003Date of Patent: August 7, 2007Assignee: Intel CorporationInventors: James Kardach, Jeffrey Huckins, Kristoffer Fleming, Brian Belmont, Pochang Hsu, Venu Kuchibhotla, Richard Forand, Uma Gadamsetty, Gunner Danneels
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Publication number: 20070136774Abstract: A method and apparatus for controlling power up of an electronic device with a video camera is provided. The present invention provides for using a video camera attached to an electronic device, such as a computer system, to cause the electronic device to be powered up from sleep mode when motion is detected. The electronic device may also be powered up from being shut down. In one embodiment, the video camera includes a processor and memory that compare consecutive frames captured by the video camera. When the electronic device is in sleep mode, if consecutive frames are the same, the video camera continues to monitor the scene without generating an output signal. If the frames are different, motion is detected and the video camera generates a signal that is used to determine whether the electronic device should power up. In this manner, the electronic device may begin the powering up process before the user of the device interacts with the device.Type: ApplicationFiled: February 22, 2007Publication date: June 14, 2007Inventors: David Lourie, Pedro Fajardo, Gunner Danneels
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Patent number: 7114090Abstract: A method is described that involves operating a computing system within a normal on state and transitioning from the normal on state to a main CPU/OS based state. In the main CPU/OS based state one or more components of the computing system are inactivated so as to cause the computing system to consume less power in the main CPU/OS based state than in the normal on state. The computing system is able to execute software application routines on a main CPU and a main OS of the computing system while in the main CPU/OS based state.Type: GrantFiled: February 14, 2003Date of Patent: September 26, 2006Assignee: Intel CorporationInventors: James P. Kardach, Jeffrey L. Huckins, Kristoffer D. Fleming, Uma M. Gadamsetty, Vivek Gupta, Brian V. Belmont, Muthu K. Kumar, Riley W. Jackson, Gunner Danneels, Richard A. Forand
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Publication number: 20060206627Abstract: A computing system is described that includes a main system bus that remains active while said computing system operates within a non main CPU/OS based operational state. The computing system also includes a controller that operates functional tasks while the computing system is within the non main CPU/OS based operational state. The computing system also includes an I/O unit coupled to the main system bus that remains active while the computing system operates within the non main CPU/OS based operational state.Type: ApplicationFiled: May 15, 2006Publication date: September 14, 2006Inventors: James Kardach, Brian Belmont, Muthu Kumar, Riley Jackson, Gunner Danneels, Richard Forand, Vivek Gupta, Jeffrey Huckins, Kristoffer Flemming, Uma Gadamsetty
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Patent number: 7080271Abstract: A computing system is described that includes an I/O unit interface that is deactivated while said computing system operates within a non main CPU/OS based operational state. The computing system also includes a controller that operates functional tasks while the computing system is within the non main CPU/OS based operational state. The computing system also includes an I/O unit that is coupled to both the I/O unit interface and the controller.Type: GrantFiled: February 14, 2003Date of Patent: July 18, 2006Assignee: Intel CorporationInventors: James P. Kardach, Brian V. Belmont, Muthu K. Kumar, Riley W. Jackson, Gunner Danneels, Richard A. Forand, Vivek Gupta, Jeffrey L. Huckins, Kristoffer D. Flemming, Uma M. Gadamsetty
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Publication number: 20060143487Abstract: A method is described that involves operating a computing system within a normal on state and transitioning from the normal on state to a main CPU/OS based state. In the main CPU/OS based state one or more components of the computing system are inactivated so as to cause the computing system to consume less power in the main CPU/OS based state than in the normal on state. The computing system is able to execute software application routines on a main CPU and a main OS of the computing system while in the main CPU/OS based state.Type: ApplicationFiled: October 28, 2005Publication date: June 29, 2006Inventors: James Kardach, Jeffrey Huckins, Kristoffer Fleming, Uma Gadamsetty, Vivek Gupta, Brian Belmont, Muthu Kumar, Riley Jackson, Gunner Danneels, Richard Forand
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Publication number: 20060069922Abstract: An apparatus for visually authenticating a user, the apparatus including a digital device, a camera coupled to said digital device, and an identity module coupled to said digital device and including a secured memory with a photo image of the user stored therein.Type: ApplicationFiled: September 30, 2004Publication date: March 30, 2006Applicant: Intel CorporationInventors: Lenka Jelinek, Muthu Kumar, Gunner Danneels