Abstract: A subtractor circuit which provides, at an output, a signal that is proportional to the difference, which is applied to the input, between two signal levels is specified. Formed at the output of an operational amplifier of the subtractor circuit are two synchronous signal sources, one of which is used for feedback from one of the two identical outputs to an input of the operational amplifier. In accordance with the proposed principle, a feedback resistor which is normally present in analog subtractor circuits is avoided. The altered voltage swing at the output of the operational amplifier makes it possible to operate the latter without a negative supply voltage. The subtractor circuit described is particularly suited to power detection using an input-side power detector.

Abstract: A power amplifier arrangement comprises a power amplifier in a semiconductor body. At least one first input terminal on the surface of the semiconductor body is provided for feeding in a signal to be amplified. A first output tap of the arrangement is designed for outputting a signal with a first center frequency; a second and a third output tap are designed for outputting a second signal with a second center frequency. A line wire is respectively connected to the second and third output taps on the surface of the semiconductor body. According to the invention, a charge store is provided, which is coupled to the third output tap and is designed for forming a series resonant circuit with the line wire connected to the third output tap.

Abstract: An integrated power amplifier arrangement with multistage construction is provided, in which a matching filter with integrated capacitance and inductance for impedance transformation is provided between an input transistor and an output transistor. In one example, the inductance of the matching filter is formed as a microstrip conductor, resulting in a significantly higher quality factor of the inductance and hence an improved linearity and an improved efficiency of the integrated power amplifier. The invention can advantageously be employed in particular in integrated transmitting arrangements.

Abstract: A power amplifier arrangement comprises a power amplifier in a semiconductor body. At least one first input terminal on the surface of the semiconductor body is provided for feeding in a signal to be amplified. A first output tap of the arrangement is designed for outputting a signal with a first center frequency; a second and a third output tap are designed for outputting a second signal with a second center frequency. A line wire is respectively connected to the second and third output taps on the surface of the semiconductor body. According to the invention, a charge store is provided, which is coupled to the third output tap and is designed for forming a series resonant circuit with the line wire connected to the third output tap.

Abstract: A subtractor circuit which provides, at an output, a signal that is proportional to the difference, which is applied to the input, between two signal levels is specified. Formed at the output of an operational amplifier of the subtractor circuit are two synchronous signal sources, one of which is used for feedback from one of the two identical outputs to an input of the operational amplifier. In accordance with the proposed principle, a feedback resistor which is normally present in analog subtractor circuits is avoided. The altered voltage swing at the output of the operational amplifier makes it possible to operate the latter without a negative supply voltage. The subtractor circuit described is particularly suited to power detection using an input-side power detector.

Abstract: An integrated power amplifier arrangement with multistage construction is provided, in which a matching filter with integrated capacitance and inductance for impedance transformation is provided between an input transistor and an output transistor. In one example, the inductance of the matching filter is formed as a microstrip conductor, resulting in a significantly higher quality factor of the inductance and hence an improved linearity and an improved efficiency of the integrated power amplifier. The invention can advantageously be employed in particular in integrated transmitting arrangements.

Abstract: The analog multiplier has a MOS input stage. This makes it possible to increase the linearity range of the multiplier. In a development, a cascode circuit having an additional pair of bipolar transistors is provided, which makes it possible to achieve a higher linearity without increasing the supply voltage. The analog multiplier is particularly suitable as a down-converter in a reception path of a mobile radio system.

Abstract: An amplifier circuit having an amplifier stage is specified, in which, in order to avoid breakdown effects in the transistors thereof, an in-phase regulator is provided which, on the load side, is connected on the one hand to the amplifier stage and on the other hand to a reference-ground potential terminal, and which limits the voltage dropped across the amplifier stage. The in-phase regulator on the reference-ground potential side also enables the use of standard components at high supply voltages. The amplifier circuit can be used for example as a radio frequency output stage.

Abstract: An amplifier circuit having an amplifier stage is specified, in which, in order to avoid breakdown effects in the transistors thereof, an in-phase regulator is provided which, on the load side, is connected on the one hand to the amplifier stage and on the other hand to a reference-ground potential terminal, and which limits the voltage dropped across the amplifier stage. The in-phase regulator on the reference-ground potential side also enables the use of standard components at high supply voltages. The amplifier circuit can be used for example as a radio frequency output stage.

Abstract: The analog multiplier has a MOS input stage. This makes it possible to increase the linearity range of the multiplier. In a development, a cascode circuit having an additional pair of bipolar transistors is provided, which makes it possible to achieve a higher linearity without increasing the supply voltage. The analog multiplier is particularly suitable as a down-converter in a reception path of a mobile radio system.

Abstract: A circuit configuration generates an even-numbered duty factor with an odd-numbered division n of a symmetrical clock signal. A first device generates a first output signal from the symmetrical clock signal. The first output signal begins upon each n.sup.th edge of one type, of a symmetrical clock signal and remains active for a length of N-1/2 periods of the symmetrical clock signal. A second device generates a second output signal from the symmetrical clock signal. The second output signal begins upon each n.sup.th edge of another type, of the symmetrical clock signal and remains active for the length of N-1/2 periods of the symmetrical clock signal. A logic linkage is connected to the first and second devices for linking the two output signals to form one symmetrical output signal.

Abstract: In a method and apparatus for reducing power loss in devices for contactless data and energy transfer, a function unit is provided in a movable part which ascertains the value of the current loss of a voltage regulator. This value is then either stored in memory or compared with a command value. A stationary part can read out this value or receive a signal if the command value is exceeded, which indicates to it that the energy supply must be reduced.

Abstract: Devices for contactless data and energy transfer include a stationary part having at least one coil for data and energy transfer, and a moveable part having at least one coil for data and energy transfer and having at least one memory unit. A method for reducing power loss in the devices includes transferring a test data word from the stationary part to the moveable part at a maximum energy, in an initializing mode, storing the transferred test data word in the memory unit of the moveable part, subsequently reading a test data word out of the memory unit of the moveable part and comparing the transferred test data word and the read-out test data word in the stationary part, reducing an energy supply if the transferred test data word and the read-out test data word match, and raising the energy supply by a defined amount and ending the initializing mode, if the transferred test data word and the read-out test data word do not match.

Abstract: An apparatus for contactless data and energy transmission and includes a stationary part having device for transmitting and receiving data and device for generating energy. A movable part has a plurality of rectifier devices each with at least one output and modulators each being connected downstream of a respective one of the rectifier devices. A first pair of coils is connected to the device for transmitting and receiving data and to the rectifier device for transmitting data from the stationary part to the movable part. A second pair of coils is connected to the device for generating energy and to the rectifier device for transmitting energy from the stationary part to the movable part. The coils in the stationary part are arbitrarily associated with the coils in the movable part, and data is transmitted from the movable part to the stationary part by a load variation at the coil of the movable part not being used for energy transmission.

Abstract: An integrable shunt regulator includes two connection terminals to be connected between poles of a supply voltage source. A controllable semiconductor component has a control input and a load path connected to the two connection terminals. A differential amplifier has first and second inputs and an output connected to the control input of the controllable semiconductor component. First and second transistors have emitter terminals and interconnected base and collector terminals connected to one of the connection terminals. A first resistor is provided. The emitter terminal of the first transistor is connected to the first input of the differential amplifier and is connected through the first resistor to the other of the connection terminals. A series circuit of second and third resistors has a connection node connected to the second input of the differential amplifier.

Abstract: For switching or, respectively, distributing broadband communication signals in message switching systems, broadband switching matrix networks having crosspoint circuits realized in an ECL technology and which are formed by controllable multiplexers is provided. The controllable multiplexers are mutually interconnected to form multistage crosspoint pyramids respectively exhibiting an outgoing line and a plurality of incoming lines, whereby the controllable multiplexers of a respective plurality of crosspoint pyramids are combined on a chip module. The chip module may be a master slice module. An additional transfer crosspoint in the form of a 2-bit multiplexer can be provided at the tip of the pyramid at each crosspoint pyramid, the additional transfer crosspoint also being connectible to the pyramid chip of a further crosspoint pyramid in order to therefore introduce a corresponding expansion of the switching matrix network.