Patents by Inventor Gunter Freudig

Gunter Freudig has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4963872
    Abstract: An arrangement for generating mean-value-free binary signals includes a binarizing circuit which receives an analog signal to be binarized and binarizes said signal with respect to a binarizing threshold. Connected to the output of the binarizing circuit is a closed-loop control circuit which includes a differential integrator which receives at the one input the binary signal from the output of the binarizing circuit. Applied to the second input of the differential integrator is a desired value signal which corresponds to the mean value between the two signal levels of the binary signal. The differential integrator integrates the deviation between the binary signal and the desired value signal and furnishes a signal corresponding to the integrated deviation. By the signal corresponding to the integrated deviation the position of the analog signal relatively to the binarizing threshold is shifted in a sense such that the mean value of the deviation is regulated to zero.
    Type: Grant
    Filed: September 9, 1987
    Date of Patent: October 16, 1990
    Assignee: Endress u. Hauser GmbH u. Co.
    Inventors: Georg Schneider, Gunter Freudig, Fernand Rippinger, Hans Braun
  • Patent number: 4817014
    Abstract: A digital correlator for determining the offset time between two random signals offset in time with respect to each other includes an analog signal processing arrangement and a digital signal processing unit. The analog signal processing arrangement generates by binarizing and periodic sampling of the random signals and their derivatives binary signals, each of which represents the polarity of one of the random signals or the derivative of a random signal at the sampling instants. The digital signal processing unit includes two delay circuits, each of which imparts to one of the binary signals a delay of an adjustable multiple of the sampling period.
    Type: Grant
    Filed: September 9, 1987
    Date of Patent: March 28, 1989
    Assignee: Endress u. Hauser GmbH u. Co.
    Inventors: Georg Schneider, Gunter Freudig, Fernand Rippinger, Hans Braun