Patents by Inventor Gunther Mackh

Gunther Mackh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230130979
    Abstract: A semiconductor device includes an active region and a trapping region positioned peripherally with respect to the active region, the trapping region presenting trapping apertures permitting the passage of particles, the trapping apertures being in fluid communication with at least one trapping chamber for trapping the particles. A method for manufacturing the semiconductor devices from one semiconductor wafer presents semiconductor device regions to be singulated along a dicing portion line.
    Type: Application
    Filed: October 18, 2022
    Publication date: April 27, 2023
    Inventors: Gunther Mackh, Martin Brandl, Bernhard Drummer
  • Publication number: 20230066813
    Abstract: A wafer, electronic component and method are disclosed. In one example, the wafer comprises an array of a plurality of electronic components. The separation frame separating neighboured electronic components, wherein the separation frame comprises a laser penetration affecting structure configured for locally affecting laser penetration when subjecting the separation frame to laser processing during stealth dicing.
    Type: Application
    Filed: August 11, 2022
    Publication date: March 2, 2023
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Gunther MACKH, Adolf KOLLER, Michael KRAUS
  • Publication number: 20220328355
    Abstract: A method of separating an electronic chip from a wafer is disclosed. In one aspect, the method comprises forming at least one trench in a back side of the wafer around at least part of the electronic chip to be separated, forming a back side metallization covering at least part of the back side and at least part of the at least one trench and attaching an adhesive layer of a tape to at least part of the back side metallization. The electronic chip is separated by removing material from a front side of the wafer along a separation path which includes part of the at least one trench in such a way that, during separating, the adhesive layer fills at least part of the at least one trench above a level of the back side metallization on the back side.
    Type: Application
    Filed: March 23, 2022
    Publication date: October 13, 2022
    Applicant: Infineon Technologies AG
    Inventors: Gunther MACKH, Martin BRANDL
  • Publication number: 20220270985
    Abstract: A semiconductor chip having a crack stop structure is disclosed. The crack stop structure includes one or more recesses formed in the semiconductor chip. The one or more recesses extend adjacent to and along a periphery of the semiconductor chip. The one or more recesses are filled with a metal material. The metal material has an intrinsic tensile stress at room temperature that induces compressive stress in at least a region of the periphery of the semiconductor chip.
    Type: Application
    Filed: January 24, 2022
    Publication date: August 25, 2022
    Inventors: Sergey Ananiev, Andreas Bauer, Michael Goroll, Maria Heidenblut, Stefan Kaiser, Gunther Mackh, Kabula Mutamba, Reinhard Pufall, Georg Reuther
  • Patent number: 10748801
    Abstract: According to various embodiments, a method for processing a carrier may include: forming an arrangement of defects in the carrier, wherein a surface region of the carrier is disposed over the arrangement of defects at a first surface of the carrier, wherein the arrangement of defects is configured to generate a crack structure extending from the arrangement of defects into the surface region; partially removing the carrier to remove the arrangement of defects; and separating the surface region of the carrier into a plurality of surface region portions along the crack structure.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: August 18, 2020
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Gunther Mackh, Markus Brunnbauer, Adolf Koller, Jochen Mueller
  • Patent number: 10600701
    Abstract: A wafer in accordance with various embodiments may include: at least one metallization structure including at least one opening; and at least one separation line region along which the wafer is to be diced, wherein the at least one separation line region intersects the at least one opening.
    Type: Grant
    Filed: September 4, 2018
    Date of Patent: March 24, 2020
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Gunther Mackh, Gerhard Leschik, Maria Heidenblut
  • Publication number: 20200043562
    Abstract: A method for programming a one-time programmable structure is disclosed. The method comprises producing an electrical circuit having the one-time programmable structure. The method furthermore comprises severing the one-time programmable structure by etching the one-time programmable structure in a separating region.
    Type: Application
    Filed: July 31, 2019
    Publication date: February 6, 2020
    Inventors: Wolfgang LIEBL, Stefan ALMSTAETTER, Jens ARKENAU, Josef BOECK, Rainer LEUSCHNER, Gunther MACKH
  • Publication number: 20180374766
    Abstract: A wafer in accordance with various embodiments may include: at least one metallization structure including at least one opening; and at least one separation line region along which the wafer is to be diced, wherein the at least one separation line region intersects the at least one opening.
    Type: Application
    Filed: September 4, 2018
    Publication date: December 27, 2018
    Inventors: Gunther Mackh, Gerhard Leschik, Maria Heidenblut
  • Publication number: 20180286735
    Abstract: According to various embodiments, a method for processing a carrier may include: forming an arrangement of defects in the carrier, wherein a surface region of the carrier is disposed over the arrangement of defects at a first surface of the carrier, wherein the arrangement of defects is configured to generate a crack structure extending from the arrangement of defects into the surface region; partially removing the carrier to remove the arrangement of defects; and separating the surface region of the carrier into a plurality of surface region portions along the crack structure.
    Type: Application
    Filed: March 29, 2018
    Publication date: October 4, 2018
    Inventors: Gunther Mackh, Markus Brunnbauer, Adolf Koller, Jochen Mueller
  • Patent number: 10090214
    Abstract: A wafer in accordance with various embodiments may include: at least one metallization structure including at least one opening; and at least one separation line region along which the wafer is to be diced, wherein the at least one separation line region intersects the at least one opening.
    Type: Grant
    Filed: October 15, 2012
    Date of Patent: October 2, 2018
    Assignee: Infineon Technologies AG
    Inventors: Gunther Mackh, Gerhard Leschik, Maria Heidenblut
  • Patent number: 10008318
    Abstract: In one embodiment, an inductor has a substrate, a conductor disposed above the substrate and a seamless ferromagnetic material surrounding at least a first portion of the conductor.
    Type: Grant
    Filed: September 2, 2016
    Date of Patent: June 26, 2018
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Gunther Mackh, Carsten Ahrens, Klemens Pruegl
  • Patent number: 9911655
    Abstract: A method of dicing a wafer may include forming a plurality of active regions in a wafer, each active region including at least one electronic component, the active regions extending from a first surface of the wafer into the wafer by a height and being separated by separation regions, forming at least one trench in the wafer by plasma etching in at least one separation region from the first surface of the wafer. The at least one trench is extending into the wafer farther than the plurality of active regions. The method may further include processing a remaining portion of the wafer in the separation region to separate the wafer into individual chips.
    Type: Grant
    Filed: December 27, 2016
    Date of Patent: March 6, 2018
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Markus Brunnbauer, Bernhard Drummer, Korbinian Kaspar, Gunther Mackh
  • Publication number: 20170110371
    Abstract: A method of dicing a wafer may include forming a plurality of active regions in a wafer, each active region including at least one electronic component, the active regions extending from a first surface of the wafer into the wafer by a height and being separated by separation regions, forming at least one trench in the wafer by plasma etching in at least one separation region from the first surface of the wafer. The at least one trench is extending into the wafer farther than the plurality of active regions. The method may further include processing a remaining portion of the wafer in the separation region to separate the wafer into individual chips.
    Type: Application
    Filed: December 27, 2016
    Publication date: April 20, 2017
    Inventors: Markus BRUNNBAUER, Bernhard DRUMMER, Korbinian KASPAR, Gunther MACKH
  • Patent number: 9576875
    Abstract: A method for manufacturing a chip arrangement is provided, the method including: forming a hole in a carrier including at least one chip, wherein forming a hole in the carrier includes: selectively removing carrier material, thereby forming a cavity in the carrier, forming passivation material over one or more cavity walls exposed by the selective removal of the carrier material; selectively removing a portion of the passivation material and further carrier material exposed by the selective removal of the passivation material, wherein a further portion of the passivation material remains over at least one cavity side wall; the method further including subsequently forming a layer over the further portion of passivation material remaining over the at least one cavity side wall.
    Type: Grant
    Filed: January 7, 2015
    Date of Patent: February 21, 2017
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Reinhard Hess, Katharina Umminger, Gabriel Maier, Markus Menath, Gunther Mackh, Hannes Eder, Alexander Heinrich
  • Patent number: 9570352
    Abstract: A method of dicing a wafer may include forming a plurality of active regions in a wafer, each active region including at least one electronic component, the active regions extending from a first surface of the wafer into the wafer by a height and being separated by separation regions, the separation regions being free from metal, forming at least one trench in the wafer by plasma etching in at least one separation region from the first surface of the wafer. The at least one trench is extending into the wafer farther than the plurality of active regions. The method may further include processing a remaining portion of the wafer in the separation region to separate the wafer into individual chips.
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: February 14, 2017
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Markus Brunnbauer, Bernhard Drummer, Korbinian Kaspar, Gunther Mackh
  • Publication number: 20160372256
    Abstract: In one embodiment, an inductor has a substrate, a conductor disposed above the substrate and a seamless ferromagnetic material surrounding at least a first portion of the conductor.
    Type: Application
    Filed: September 2, 2016
    Publication date: December 22, 2016
    Inventors: Gunther Mackh, Carsten Ahrens, Klemens Pruegl
  • Publication number: 20160211178
    Abstract: A method of dicing a wafer may include forming a plurality of active regions in a wafer, each active region including at least one electronic component, the active regions extending from a first surface of the wafer into the wafer by a height and being separated by separation regions, the separation regions being free from metal, forming at least one trench in the wafer by plasma etching in at least one separation region from the first surface of the wafer. The at least one trench is extending into the wafer farther than the plurality of active regions. The method may further include processing a remaining portion of the wafer in the separation region to separate the wafer into individual chips.
    Type: Application
    Filed: December 10, 2015
    Publication date: July 21, 2016
    Inventors: Markus BRUNNBAUER, Bernhard DRUMMER, Korbinian KASPAR, Gunther MACKH
  • Patent number: 9196670
    Abstract: Through substrate features in semiconductor substrates are described. In one embodiment, the semiconductor device includes a through substrate via disposed in a first region of a semiconductor substrate. A through substrate conductor coil is disposed in a second region of the semiconductor substrate.
    Type: Grant
    Filed: February 13, 2014
    Date of Patent: November 24, 2015
    Assignee: Infineon Technologies AG
    Inventors: Gunther Mackh, Uwe Siedel, Rainer Leuschner
  • Patent number: 9159620
    Abstract: One or more embodiments relate to a method for making a semiconductor structure, comprising: providing a substrate; forming a dielectric layer over the substrate; forming a first opening and a second opening at least partially simultaneously through the dielectric layer over the substrate; and forming a third opening through the bottom surface of the first opening and into at least a portion of the substrate.
    Type: Grant
    Filed: September 2, 2014
    Date of Patent: October 13, 2015
    Assignee: Infineon Technologies AG
    Inventors: Gunther Mackh, Uwe Seidel, Rainer Leuschner
  • Patent number: 9147624
    Abstract: A method for manufacturing a plurality of chips comprises the step of providing a wafer comprising a plurality of chip areas separated by one or more dicing lines, wherein the chip areas are arranged on a first main surface, the step of providing a laser absorption layer on a second main surface opposite to the first main surface and the step of providing a backside metal stack on the laser absorption layer. After that a laser light is applied to the laser absorption layer along the dicing lines before the chips are singulated along the dicing lines by using stealth dicing.
    Type: Grant
    Filed: June 4, 2014
    Date of Patent: September 29, 2015
    Assignee: Infineon Technologies AG
    Inventors: Gunther Mackh, Adolf Koller