Patents by Inventor Gunther Schindler

Gunther Schindler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7422940
    Abstract: A process for producing a layer arrangement, in which a plurality of electrically conductive structures are formed on a substrate, a first electrically insulating layer is formed on the plurality of electrically conductive structures, in such a manner than trenches are formed between mutually adjacent regions of the first electrically insulating layer, electrically insulating structures are formed in the trenches between the adjacent regions of the first electrically insulating layer, material of the first electrically insulating layer is removed, so that airgaps are formed between the electrically insulating structures and the electrically conductive structures, and a second electrically insulating layer is formed on the electrically conductive structures and on the electrically insulating structures, in such a manner that the second electrically insulating layer spans adjacent electrically conductive structures and electrically insulating structures.
    Type: Grant
    Filed: August 1, 2005
    Date of Patent: September 9, 2008
    Assignee: Infineon Technologies AG
    Inventors: Gunther Schindler, Werner Pamler
  • Patent number: 7276300
    Abstract: The invention relates to a microelectronic structure which provides improved protection of a hydrogen-sensitive dielectric against hydrogen contamination. According to the invention, the hydrogen sensitive dielectric (14) is covered at lest by an intermediate oxide (18), where material thickness is at lest five times the thickness of the hydrogen-sensitive dielectric. The intermediate oxide (18) simultaneously acts as an internal dielectric and is metabolized on its surface for this purpose. The intermediate oxide (18), which has a sufficient thickness absorbers the hydrogen that may be released during the deposition of a hydrogen barrier layer (22, 26), thus protecting the hydrogen-sensitive dielectric (14).
    Type: Grant
    Filed: April 22, 2002
    Date of Patent: October 2, 2007
    Assignee: Infineon Technologies AG
    Inventors: Zvonimir Gabric, Walter Hartner, Matthias Krönke, Günther Schindler
  • Patent number: 7262984
    Abstract: To store information in a ferroelectric material, a sample probe is used to bring about mechanical action on individual domains and thereby to cause a reversal of polarization in the individual domains, with electrodes situated below the ferroelectric material being able to have a bias applied to them to stabilize the change/reversal of polarization. The reversal of polarization causes an alteration in the surface topography of the ferroelectric material, and this alteration can be used to read the information. The stored information is therefore obtained by ascertaining the surface topography of the ferroelectric material. The information is written and read using an AFM tip, with the tip being able to be operated in contact or tapping mode for the purpose of writing, and additionally in noncontact mode for the purpose of reading.
    Type: Grant
    Filed: January 13, 2005
    Date of Patent: August 28, 2007
    Inventors: Günther Schindler, Markus Vogel, Christian Erich Zybill
  • Patent number: 7211909
    Abstract: A monolithic integrated circuit arrangement containing a substrate, a functional unit formed in and/or on the substrate, and an energy supply unit, which is formed in and/or on the substrate and is coupled to the functional unit and has an inductance and a permanent magnet. The inductance and the permanent magnet are arranged such that, under a vibration on the circuit arrangement, the permanent magnet is moved relative to the inductance such that an electrical induced voltage for supplying the functional unit with electrical energy is induced by the inductance.
    Type: Grant
    Filed: March 5, 2004
    Date of Patent: May 1, 2007
    Assignee: Infineon Technologies AG
    Inventor: Gunther Schindler
  • Patent number: 7033926
    Abstract: An interconnect arrangement comprises a substrate made from a first insulating material with a substrate surface, at least two interconnects which are arranged next to one another in the substrate, a buffer layer made from a second insulating material above the substrate and comprising a buffer-layer surface, which is parallel to the substrate surface, at least one cavity, which is arranged between the interconnects and, with respect to the buffer-layer surface, extends deeper into the substrate than the interconnects, and a covering layer made from a third insulating material, which is arranged above the buffer layer and completely closes off the cavity with respect to the buffer-layer surface.
    Type: Grant
    Filed: August 9, 2002
    Date of Patent: April 25, 2006
    Assignee: Infineon Technologies, AG
    Inventors: Günther Schindler, Werner Pamler, Zvonimir Gabric
  • Publication number: 20060022345
    Abstract: A process for producing a layer arrangement, in which a plurality of electrically conductive structures are formed on a substrate, a first electrically insulating layer is formed on the plurality of electrically conductive structures, in such a manner than trenches are formed between mutually adjacent regions of the first electrically insulating layer, electrically insulating structures are formed in the trenches between the adjacent regions of the first electrically insulating layer, material of the first electrically insulating layer is removed, so that airgaps are formed between the electrically insulating structures and the electrically conductive structures, and a second electrically insulating layer is formed on the electrically conductive structures and on the electrically insulating structures, in such a manner that the second electrically insulating layer spans adjacent electrically conductive structures and electrically insulating structures.
    Type: Application
    Filed: August 1, 2005
    Publication date: February 2, 2006
    Applicant: Infineon Technologies AG
    Inventors: Gunther Schindler, Werner Pamler
  • Publication number: 20050195631
    Abstract: To store information in a ferroelectric material, a sample probe is used to bring about mechanical action on individual domains and thereby to cause a reversal of polarization in the individual domains, with electrodes situated below the ferroelectric material being able to have a bias applied to them to stabilize the change/reversal of polarization. The reversal of polarization causes an alteration in the surface topography of the ferroelectric material, and this alteration can be used to read the information. The stored information is therefore obtained by ascertaining the surface topography of the ferroelectric material. The information is written and read using an AFM tip, with the tip being able to be operated in contact or tapping mode for the purpose of writing, and additionally in noncontact mode for the purpose of reading.
    Type: Application
    Filed: January 13, 2005
    Publication date: September 8, 2005
    Applicant: Infineon Technologies AG
    Inventors: Gunther Schindler, Markus Vogel, Christian Zybill
  • Publication number: 20050079700
    Abstract: An interconnect arrangement comprises a substrate made from a first insulating material with a substrate surface, at least two interconnects which are arranged next to one another in the substrate, a buffer layer made from a second insulating material above the substrate and comprising a buffer-layer surface, which is parallel to the substrate surface, at least one cavity, which is arranged between the interconnects and, with respect to the buffer-layer surface, extends deeper into the substrate than the interconnects, and a covering layer made from a third insulating material, which is arranged above the buffer layer and completely closes off the cavity with respect to the buffer-layer surface.
    Type: Application
    Filed: August 9, 2002
    Publication date: April 14, 2005
    Inventors: Gunther Schindler, Werner Palmer, Zvonimir Gabric
  • Patent number: 6852240
    Abstract: A ferroelectric capacitor configuration is configured with at least two different coercitive voltages. A first electrode structure having a surface which forms at least two levels is firstly produced. A layer of ferroelectric material of varying thickness is deposited over the first electrode by spin coating. A second electrode structure is subsequently formed on the layer of ferroelectric material.
    Type: Grant
    Filed: February 26, 2001
    Date of Patent: February 8, 2005
    Assignee: Infineon Technologies AG
    Inventors: Walter Hartner, Günther Schindler, Volker Weinrich, Igor Kasko
  • Publication number: 20040246647
    Abstract: A monolithic integrated circuit arrangement containing a substrate, a functional unit formed in and/or on the substrate, and an energy supply unit, which is formed in and/or on the substrate and is coupled to the functional unit and has an inductance and a permanent magnet. The inductance and the permanent magnet are arranged such that, under a vibration on the circuit arrangement, the permanent magnet is moved relative to the inductance such that an electrical induced voltage for supplying the functional unit with electrical energy is induced by the inductance.
    Type: Application
    Filed: March 5, 2004
    Publication date: December 9, 2004
    Applicant: Infineon Technologies AG
    Inventor: Gunther Schindler
  • Patent number: 6825116
    Abstract: A method for removing structures from a substrate is described. The method includes providing a substrate that has the structures that must be removed, applying a sacrifice layer, and removing the structures and the sacrifice layer in a polishing step. The method has the advantage that the sacrifice layer surrounds the structures that must be removed and stabilizes them, so that the structures can be eroded slowly and successively in the subsequent polishing step without breaking off. This prevents a smearing of the material of the structures such as occurs given direct polishing without a sacrifice layer.
    Type: Grant
    Filed: April 30, 2001
    Date of Patent: November 30, 2004
    Assignee: Infineon Technologies AG
    Inventors: Gerhard Beitel, Mattias Ahlstedt, Walter Hartner, Günther Schindler, Marcus Kastner, Volker Weinrich
  • Publication number: 20040191532
    Abstract: The invention relates to a microelectronic structure which provides improved protection of a hydrogen-sensitive dielectric against hydrogen contamination. According to the invention, the hydrogen sensitive dielectric (14) is covered at lest by an intermediate oxide (18), where material thickness is at lest five times the thickness of the hydrogen-sensitive dielectric. The intermediate oxide (18) simultaneously acts as an internal dielectric and is metabolized on its surface for this purpose. The intermediate oxide (18), which has a sufficient thickness absorbers the hydrogen that may be released during the deposition of a hydrogen barrier layer (22, 26), thus protecting the hydrogen-sensitive dielectric (14).
    Type: Application
    Filed: May 18, 2004
    Publication date: September 30, 2004
    Inventors: Zvonimir Gabric, Walter Hartner, Matthias Kronke, Gunther Schindler
  • Patent number: 6730562
    Abstract: A method for structuring ferroelectric layers on semiconductor substrates retains or regenerates the adherence and breakdown voltage resistance of the ferroelectric layer, which is especially significant for producing storage capacitors in large-scale integrated FeRAM and DRAM memory components. The addition of H2O or O2 results principally in the recovery of the electrostatic breakdown strength of the ferroelectric layer, which is of importance in particular when the ferroelectric serves as a dielectric of a storage capacitor and has to withstand electric fields of 5-10×106 V/m without a significant leakage current.
    Type: Grant
    Filed: February 11, 2003
    Date of Patent: May 4, 2004
    Assignee: Infineon Technologies AG
    Inventors: Manfred Engelhardt, Walter Hartner, Frank Hintermaier, Günther Schindler, Volker Weinrich
  • Patent number: 6681148
    Abstract: The invention relates to a monitoring system for a conveying device for flat articles, especially wafers, which conveying device is provided with a carriage (28) that is movable along a predetermined path next to a flat article (10) that is located at a predetermined removal location, the carriage having a receiving device for the accommodation of the flat article (10), which monitoring system contains a light source (50) having a light-exit window and a light receiver (52) having a light-admission window, whereby the light-exit window and the light-admission window are positioned in such a way that a light beam (60) directed form the light-exit window to the light-admission window is partially covered by the carriage (28) during its movement through the light beam, and an evaluation unit that is connected to the light receiver and that compares a target signal derived from its movement of the carriage along a target path with an actual signal derived from an actual movement of the carriage, and indicates a d
    Type: Grant
    Filed: June 3, 2002
    Date of Patent: January 20, 2004
    Assignee: Logitex Reinstmedientechnik GmbH
    Inventors: Hans Lettner, Xaver Kollmer, Günther Schindler, Ernst Georg Frisch
  • Patent number: 6656787
    Abstract: A method for fabricating a semiconductor component includes the steps of applying an electrode material and a metal-oxide-containing layer on a substrate surface and selectively etching the electrode material and the metal-oxide-containing layer for forming a first electrode from the electrode material and forming a metal oxide layer from the metal-oxide-containing layer, wherein the metal oxide layer is disposed on top of the first electrode. The method further includes conformally applying a conductive material which has a given material thickness, anisotropically etching the conductive material for fabricating a resistance element in the form of a self-aligned lateral edge web on at least one sidewall of the metal oxide layer and of the first electrode, and applying a further electrode material at least on the resistance element for forming a second electrode.
    Type: Grant
    Filed: September 24, 2001
    Date of Patent: December 2, 2003
    Assignee: Infineon Technologies AG
    Inventors: Günther Schindler, Walter Hartner
  • Patent number: 6649424
    Abstract: A method of fabricating semiconductor circuits having integrated capacitors that have a dielectric or a ferroelectric material between electrodes. The materials are subjected to heat treatment at high temperatures in an oxygen atmosphere for the purpose of crystallization. The dielectric or ferroelectric is heated separately from the semiconductor substrate, is comminuted into small particles and only afterward applied in this form to the semiconductor substrate. This makes it possible to integrate substances with arbitrarily high crystallization temperature without damaging the integrated semiconductor circuit, since the semiconductor substrate itself does not have to be heated. Diffusion barriers for oxygen are unnecessary. Previous limitations on the capacitor capacitance are obviated owing to the free choice of dielectric or ferroelectric made possible, and the packing density of the capacitors is increased.
    Type: Grant
    Filed: May 23, 2002
    Date of Patent: November 18, 2003
    Assignee: Infineon Technologies AG
    Inventors: Manfred Mört, Walter Hartner, Volker Weinrich, Günther Schindler
  • Patent number: 6649468
    Abstract: A method for fabricating a microelectronic component includes the step of applying a barrier against the passage of hydrogen to a storage capacitor having a ferroelectric dielectric or a paraelectric dielectric. During the formation of the barrier, firstly a silicon oxide layer is produced, the latter is then subjected to a heat treatment and a barrier layer is subsequently applied. A microelectronic component has a storage capacitor and a barrier including a silicon oxide layer and a barrier layer. The silicon oxide layer is disposed on an electrode of the storage capacitor and has been subjected to a heat treatment in an oxygen-containing atmosphere. The barrier layer is disposed on the silicon oxide layer and protects the storage capacitor against a passage of hydrogen through the barrier.
    Type: Grant
    Filed: August 24, 2001
    Date of Patent: November 18, 2003
    Assignee: Infineon Technologies AG
    Inventors: Günther Schindler, Zvonimir Gabric, Walter Hartner
  • Patent number: 6627934
    Abstract: A semiconductor memory configuration has a plurality of selection transistors. Each selection transistor is connected to a first electrode of a storage capacitor. A second electrode of the storage capacitor is connected to a common plate. The common plate is provided below the selection transistors in a semiconductor body. A method of fabricating a semiconductor memory configuration is also provided.
    Type: Grant
    Filed: March 30, 1999
    Date of Patent: September 30, 2003
    Assignee: Infineon Technologies AG
    Inventors: Günther Schindler, Carlos Mazure-Espejo
  • Patent number: 6627496
    Abstract: A process for producing structured layers on a base body, in particular a semiconductor body, includes the steps of providing a first layer, structuring the first layer with a partial or complete local layer erosion to form raised and recessed layer regions, and depositing a second layer. The structured first layer is a provided as a permanently remaining layer. Edges are formed at transitions from raised to recessed layer regions. The height difference at the edges of the structured first layer separates individual layer regions of the second layer. The edges of the raised regions act as partition edges for the second layer. A process for producing components of an integrated circuit and a process for producing a memory configuration are also provided.
    Type: Grant
    Filed: August 13, 1999
    Date of Patent: September 30, 2003
    Assignee: Infineon Technologies AG
    Inventors: Günther Schindler, Walter Hartner
  • Publication number: 20030157734
    Abstract: A method for structuring ferroelectric layers on semiconductor substrates retains or regenerates the adherence and breakdown voltage resistance of the ferroelectric layer, which is especially significant for producing storage capacitors in large-scale integrated FeRAM and DRAM memory components. The addition of H2O or O2 results principally in the recovery of the electrostatic breakdown strength of the ferroelectric layer, which is of importance in particular when the ferroelectric serves as a dielectric of a storage capacitor and has to withstand electric fields of 5-10×106 V/m without a significant leakage current.
    Type: Application
    Filed: February 11, 2003
    Publication date: August 21, 2003
    Inventors: Manfred Engelhardt, Walter Hartner, Frank Hintermaier, Gunther Schindler, Volker Weinrich