Abstract: A logic module is disclosed for construction in an integrated digital circuit for promoting testing of the integrated circuit. A latch module is provided for functioning as a latch, as a back-coupled shift register, and in one embodiment of the invention as a linear shift register. The latch module is formed of a plurality of basic cells each of which has a flip-flop with associated logic gates, one of which is an exclusive OR gate. The latch module also has an input, parallel data inputs and parallel data data outputs. For functioning in the back-coupling mode, an exclusive OR gate is connected between at least one of the flip-flops and the input to the latch module.