Abstract: A data processing method a device, and a storage medium are provided. The method includes: detecting, via a security detection device in response to receiving a data message sent by a client, whether a destination server corresponding to the data message is under cyberattack; in response to the destination server being under cyberattack, guiding the data message to a security protection device, and sending a test message to the client via the security protection device; and verifying, via the security protection device, the verification message returned by the client, and in response to the verification succeeding, determining that the client is a valid client and sending the data message to the destination server, or in response to the verification failing, determining that the client is an attacking client and discarding the data message.

Abstract: Techniques are disclosed for the use of fused vector processor instructions by a vector processor architecture. Each fused vector processor instruction may include a set of fields associated with individual vector processing instructions. The vector processor architecture may implement local buffers facilitating a single vector processor instruction to be used to execute each of the individual vector processing instructions without re-accessing vector registers between each executed individual vector processing instruction. The vector processor architecture enables less communication across the interconnection network, thereby increasing interconnection network bandwidth and the speed of computations, and decreasing power usage.

Abstract: A data processing method a device, and a storage medium are provided. The method includes: detecting, via a security detection device in response to receiving a data message sent by a client, whether a destination server corresponding to the data message is under cyberattack; in response to the destination server being under cyberattack, guiding the data message to a security protection device, and sending a test message to the client via the security protection device; and verifying, via the security protection device, the verification message returned by the client, and in response to the verification succeeding, determining that the client is a valid client and sending the data message to the destination server, or in response to the verification failing, determining that the client is an attacking client and discarding the data message.

Abstract: A MOS capacitor includes a substrate having a capacitor forming region thereon, an ion well having a first conductivity type in the substrate, a counter doping region having a second conductivity type in the ion well within the capacitor forming region, a capacitor dielectric layer on the ion well within the capacitor forming region, a gate electrode on the capacitor dielectric layer, a source doping region having the second conductivity type on a first side of the gate electrode within the capacitor forming region, and a drain doping region having the second conductivity type on a second side of the gate electrode within the capacitor forming region.

Abstract: A high-electron mobility transistor includes a substrate, a gate electrode, a drain electrode, a source electrode and a first field plate. The substrate includes an active region. The gate electrode is disposed on the substrate. The drain electrode is disposed at one side of the gate electrode. The source electrode is disposed at another side of the gate electrode. The first field plate is electrically connected with the source electrode and extends from the source electrode toward the drain electrode. An overlapping area of the first field plate and the gate electrode is smaller than an overlapping area of the gate electrode and the active region.

Abstract: A concentric-ring single-sided dovetail groove ceramic tile back mold core is disclosed. A vulcanized rubber of back mold core surface comprises raised patterns and recessed patterns integrally formed, pasted and covered on a back mold core iron substrate. The raised patterns are equidistantly offset outwards layer by layer with a central position of the back mold core as a center; and a side of each raised pattern close to the center is of an equiangular obtuse angle, and a side of each raised pattern far away from the center is of an acute angle with an angular equal difference gradually decreasing.

Abstract: The present invention provides an intelligent resilience urban-rural evaluation system and a method thereof. The system includes: a data acquisition module, a data processing module, a model building module and an evaluation calculation module. Through the study of influence of earthquake motion time history on reliability and safety of building structures, reliability evaluation and health monitoring of complex building structure systems are realized by using super-computing and storage capabilities of cloud computing.

Abstract: According to implementations of the subject matter described herein, there is proposed a solution for supporting communications for an FPGA device. In an implementation, the FPGA device includes an application module and protocol stack modules. The protocol stack modules are operable to access target devices based on different communication protocols via a physical interface. The FPGA device further includes a universal access module operable to receive, from the application module, first data and a first identity of a first target device, the first target device acting as a destination of the first data, and transmit, based on the first identity and predetermined first routing information, the first data to a first protocol stack module accessible to the first target device via the physical interface. By introducing the universal access module, it is possible to provide unified and direct communications for the application module.

Abstract: A physical container (e.g., a battery) may be filled up (charged) or emptied (discharged) with energy commensurate with requirements to post a particular amount of collateral. The disclosure provides computing systems and methods for processing data using a novel combination of wavelet techniques and rolling techniques to more efficiently detect seasonality in particular products (e.g., energy products) to more accurately model and determine collateral/margin requirements. A clearinghouse computing device may be configured to generate a margin requirement for a portfolio of products and may include a processor to process instructions that cause the clearinghouse computing device to perform wavelet decomposition and rolling methods on a historical database of records.

Abstract: A physical container (e.g., a battery) may be filled up (charged) or emptied (discharged) with energy commensurate with requirements to post a particular amount of collateral. The disclosure provides computing systems and methods for processing data using a novel combination of wavelet techniques and rolling techniques to more efficiently detect seasonality in particular products (e.g., energy products) to more accurately model and determine collateral/margin requirements. A clearinghouse computing device may be configured to generate a margin requirement for a portfolio of products and may include a processor to process instructions that cause the clearinghouse computing device to perform wavelet decomposition and rolling methods on a historical database of records.

Abstract: Techniques are disclosed for the implementation of a programmable processing array architecture that realizes vectorized processing operations for a variety of applications. Such vectorized processing operations may include digital front end (DFE) processing operations, which include finite impulse response (FIR) filter processing operations. The programmable processing array architecture provides a front-end interconnection network that generates specific data sliding time window patterns in accordance with the particular DFE processing operation to be executed. The architecture enables the processed data generated in accordance with these sliding time window patterns to be fed to a set of multipliers and adders to generate output data. The architecture supports a wide range of processing operations to be performed via a single programmable processing array platform by leveraging the programmable nature of the array and the use of instruction sets.

Abstract: A system may be configured to generate an estimate of value at risk and may include a processor to process instructions that cause the system to generate a rolling time series of value data having a plurality of dimensions, perform a transformation of the time series, perform variance scaling and correlation scaling on transformed time series, reverse transform the results of the scaling, and estimate of a value-at-risk for the value data.

Abstract: A method for processing scanning electron microscope specimen is provided. The method comprises: providing a specimen to be observed; providing a carbon nanotube array comprising a plurality of carbon nanotubes; and pulling a carbon nanotube film from the carbon nanotube array, and laying the carbon nanotube film on a surface of the specimen, wherein the carbon nanotube film comprising a plurality of through holes.

Abstract: Techniques are disclosed for a programmable processor architecture that enables data interpolation using an architecture that iteratively processes portions of a look-up table (LUT) in accordance with a fused single instruction stream, multiple data streams (SIMD) instruction. The LUT may contain segment entries that correspond to a result of evaluating a function using a corresponding index values, which represent an independent variable of the function. The index values are used to map data sample values in a data array that is to be interpolated to the segment entries. By using an iterative process of mapping data samples to valid segment entries contained in each LUT portion, the architecture advantageously facilitates scaling to support larger LUTs and thus may be expanded to enable linear interpolation on multiple dimensions.

Abstract: A system may be configured to generate an estimate of value at risk and may include a processor to process instructions that cause the system to generate a rolling time series of value data having a plurality of dimensions, perform rotation transform of the time series, perform variance scaling and correlation scaling on transformed time series, reverse transform the results of the scaling, and estimate of a value-at-risk for the value data.

Abstract: The present disclosure relates to a cover plate assembly for a lithium ion battery and a lithium ion battery. The cover plate assembly includes a cover plate body, provided at a middle portion thereof with a through hole which extends to form a tube body, and the tube body protrudes from at least one surface of the cover plate body; a pressure relief portion, wherein the pressure relief portion is located in the tube body and is in sealed communication with the tube body, the pressure relief portion is ring-shaped and is configured to crack and split from the cover plate body in response to deformation of the cover plate body; and a central conductor, embraced by the pressure relief portion and runs through the pressure relief portion along the axial direction. The cover plate assembly features excellent safety performance and small space occupation.

Abstract: A pyridine pyrrole ruthenium coordination complex, a preparation method therefor and use thereof as a catalyst for electrocatalyzing ammonia oxidation to prepare hydrazine is provided. The pyridine pyrrole ruthenium coordination complex takes high-activity metal ruthenium as a central metal ion and compounds containing pyridine pyrrole with electron withdrawing/donating capability as ligands, and thus has relatively high catalytic activity for ammonia oxidation. High conversion rate and highly selective conversion of ammonia can be realized by applying the pyridine pyrrole ruthenium coordination complex to electrocatalytic ammonia oxidation in an organic solvent, with major products including H2, N2, N2H4.

Abstract: In accordance with implementations of the subject matter described herein, there provides a solution for multi-path RDMA transmission. In the solution, at least one packet is generated based on an RDMA message to be transmitted from a first device to a second device. The first device has an RDMA connection with the second device via a plurality of paths. A first packet in the at least one packet includes a plurality of fields, which include information for transmitting the first packet over a first path of the plurality of paths. The at least one packet is transmitted to the second device over the plurality of paths via an RDMA protocol. The first packet is transmitted over the first path. The multi-path RDMA transmission solution according to the subject matter described herein can efficiently utilize rich network paths while maintaining a low memory footprint in a network interface card.