Abstract: A hybrid photonic chip comprising a plurality of semiconductor materials arranged to define a chip providing a function, wherein at least a first part of the chip is formed of materials which can be fabricated using a CMOS technique; and at least a second part of the chip which comprises non-linear crystal material and is not subjected to etching process; wherein the second part of the chip in conjunction with the first part is configured to support a propagating low loss single mode.

Abstract: The present invention relates of a photonic integrated and a method of fabricating a photonic integrated chip, PIC, configured for alignment and attachment of a laser diode in a predetermined position in which light from the laser diode is aligned with an input of the PIC; wherein the photonic chip comprises an asymmetric alignment assembly for receiving and aligning the laser diode in the predetermined position; and wherein the input comprises a coupler for receiving a laser beam from the laser diode in use.

Abstract: A tunable element for an optical waveguide device, such as an Optical Phased Array (OPA), is described. Tunable element comprises three waveguide sections arranged such that light propagates through the first waveguide section, then through the second waveguide section and then through the third waveguide section, with light being either evanescently or directly coupled from one waveguide section to the next. The tunable element further comprises one or more resistive heating pad formed proximate to the second waveguide section. The first and third waveguide sections are formed from a first material and the second waveguide section is formed from a second, different material and the second material is more thermo-optically sensitive than the first material.

Abstract: A hybrid photonic chip comprising a plurality of semiconductor materials arranged to define a chip providing a function, wherein at least a first part of the chip is formed of materials which can be fabricated using a CMOS technique; and at least a second part of the chip which comprises non-linear crystal material and is not subjected to etching process; wherein the second part of the chip in conjunction with the first part is configured to support a propagating low loss single mode.

Abstract: The present invention relates of a photonic integrated and a method of fabricating a photonic integrated chip, PIC, configured for alignment and attachment of a laser diode in a predetermined position in which light from the laser diode is aligned with an input of the PIC; wherein the photonic chip comprises an asymmetric alignment assembly for receiving and aligning the laser diode in the predetermined position; and wherein the input comprises a coupler for receiving a laser beam from the laser diode in use.

Abstract: Various embodiments may provide an optical phase array. The optical phase array may include a laser source configured to emit a laser. The optical phase array may further include an integrated photonic network with n stages of optical splitters, the optical splitters being 1 ? 2 optical splitters, each optical splitter of the integrated photonic network having an input, a first output, and a second output. The integrated photonic network may be configured to separate the laser into N outputs. Each output of the N outputs may differ from a neighbouring output of the N outputs by a constant phase difference (??). N may be equal to 2 to the power of n.

Abstract: A method of fabricating a semiconductor device, the method comprising: forming a substrate; forming a support layer from a first type of material which is not susceptible to an etch process having a predetermined thickness that is related to a required thickness of the semiconductor device; forming a device on the support layer; forming at least one layer of cladding material on the device; forming a plurality of trenches in the layers that extend at least down to the substrate; applying a film over the cladding material; removing the substrate at least in part using an etching process to separate the device from others on a wafer.

Abstract: A tunable element for an optical waveguide device, such as an Optical Phased Array (OPA), is described. Tunable element comprises three waveguide sections arranged such that light propagates through the first waveguide section, then through the second waveguide section and then through the third waveguide section, with light being either evanescently or directly coupled from one waveguide section to the next. The tunable element further comprises one or more resistive heating pad formed proximate to the second waveguide section. The first and third waveguide sections are formed from a first material and the second waveguide section is formed from a second, different material and the second material is more thermo-optically sensitive than the first material.

Abstract: Various embodiments may provide an optical phase array. The optical phase array may include a laser source configured to emit a laser. The optical phase array may further include an integrated photonic network with n stages of optical splitters, the optical splitters being 1 ? 2 optical splitters, each optical splitter of the integrated photonic network having an input, a first output, and a second output. The integrated photonic network may be configured to separate the laser into N outputs. Each output of the N outputs may differ from a neighbouring output of the N outputs by a constant phase difference (??). N may be equal to 2 to the power of n.

Abstract: According to embodiments of the present invention, an optical device is provided. The optical device includes a waveguide structure including a floating gate, and an optical waveguide arranged spaced apart from the floating gate, wherein the optical waveguide overlaps with the floating gate, a carrier injection portion arranged spaced apart from the floating gate, and an electrode arrangement, wherein, in response to a first voltage difference applied to the electrode arrangement, the optical device is configured to inject charge carriers from the carrier injection portion to the floating gate to cause a change in refractive index of the waveguide structure, and wherein, in response to a second voltage difference applied to the electrode arrangement, the optical device is configured to drive the charge carriers from the floating gate to the optical waveguide to deplete the charge carriers.

Abstract: A memory device and method comprising a metal oxide material disposed between and in electrical contact with first and second conductive electrodes, and a voltage source configured to apply a plurality of voltage pulses spaced apart in time across the first and second electrodes. For each one of the voltage pulses, an amplitude of the voltage increases during the voltage pulse.

Abstract: According to embodiments of the present invention, an optical coupling device is provided. The optical coupling device includes a substrate, and a grating arrangement including a plurality of grating elements, the plurality of grating elements being defined on one surface of the substrate, wherein the plurality of grating elements are arranged to have a first period along a first direction, and a second period along a second direction orthogonal to the first direction, the first period being different from the second period. According to further embodiments of the present invention, a photonic integrated circuit and a method of forming an optical coupling device are also provided.

Abstract: According to embodiments of the present invention, a pixel arrangement is provided. The pixel arrangement includes a plurality of pixels arranged adjacent to each other; and a substrate configured to receive the plurality of pixels, wherein each pixel of the plurality of pixels comprises a plurality of optical cells electrically coupled to each other; and an electrical interconnection electrically isolated from the plurality of optical cells, the electrical interconnection arranged to provide electrical communication between two separate conducting terminals external to the pixel.

Abstract: An optical waveguide device includes a substrate; a lower cladding disposed on the substrate; a rib waveguide including a slab disposed on the lower cladding and a single rib disposed on the slab contiguous to the slab; and an upper cladding disposed on the rib waveguide. The rib waveguide includes a first doped region having a first electric conductivity exhibiting a P-type electric conductivity across the rib and the slab and a second doped region being contiguous to the first doped region and having a second electric conductivity exhibiting an N-type electric conductivity across the rib and the slab.

Abstract: According to embodiments of the present invention, an optical device is provided. The optical device includes a waveguide structure including a floating gate, and an optical waveguide arranged spaced apart from the floating gate, wherein the optical waveguide overlaps with the floating gate, a carrier injection portion arranged spaced apart from the floating gate, and an electrode arrangement, wherein, in response to a first voltage difference applied to the electrode arrangement, the optical device is configured to inject charge carriers from the carrier injection portion to the floating gate to cause a change in refractive index of the waveguide structure, and wherein, in response to a second voltage difference applied to the electrode arrangement, the optical device is configured to drive the charge carriers from the floating gate to the optical waveguide to deplete the charge carriers.

Abstract: A memory device and method comprising a metal oxide material disposed between and in electrical contact with first and second conductive electrodes, and a voltage source configured to apply a plurality of voltage pulses spaced apart in time across the first and second electrodes. For each one of the voltage pulses, an amplitude of the voltage increases during the voltage pulse.

Abstract: A semiconductor device production method includes a first step of forming a planar silicon layer on a silicon substrate and forming first and second pillar-shaped silicon layers on the planar silicon layer; a second step of forming a gate insulating film around the first and second pillar-shaped silicon layers, forming a metal film and a polysilicon film around the gate insulating film, controlling a thickness of the polysilicon film to be smaller than a half of a distance between the first and second pillar-shaped silicon layers, depositing a resist, exposing the polysilicon film on side walls of upper portions of the first and second pillar-shaped semiconductor layers, etching-away the exposed polysilicon film, stripping the third resist, and etching-away the metal film; and a third step of forming a resist for forming a gate line and performing anisotropic etching to form a gate line and first and second gate electrodes.

Abstract: According to embodiments of the present invention, a pixel arrangement is provided. The pixel arrangement includes a plurality of pixels arranged adjacent to each other; and a substrate configured to receive the plurality of pixels, wherein each pixel of the plurality of pixels comprises a plurality of optical cells electrically coupled to each other; and an electrical interconnection electrically isolated from the plurality of optical cells, the electrical interconnection arranged to provide electrical communication between two separate conducting terminals external to the pixel.

Abstract: According to embodiments of the present invention, an optical coupling device is provided. The optical coupling device includes a substrate, and a grating arrangement including a plurality of grating elements, the plurality of grating elements being defined on one surface of the substrate, wherein the plurality of grating elements are arranged to have a first period along a first direction, and a second period along a second direction orthogonal to the first direction, the first period being different from the second period. According to further embodiments of the present invention, a photonic integrated circuit and a method of forming an optical coupling device are also provided.

Abstract: An optical waveguide device includes a substrate; a lower cladding disposed on the substrate; a rib waveguide including a slab disposed on the lower cladding and a single rib disposed on the slab contiguous to the slab; and an upper cladding disposed on the rib waveguide. The rib waveguide includes a first doped region having a first electric conductivity exhibiting a P-type electric conductivity across the rib and the slab and a second doped region being contiguous to the first doped region and having a second electric conductivity exhibiting an N-type electric conductivity across the rib and the slab.