Patents by Inventor Guo-Qin Xu

Guo-Qin Xu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130249094
    Abstract: The present invention discloses a method of preparing a transparent conducting oxide (TCO) film comprising the steps of: applying surface modified TCO nanoparticles onto a surface of a substrate; and cross-linking the surface modified TCO nanoparticles. The present invention also provides a transparent conducting oxide film prepared according to the method.
    Type: Application
    Filed: November 28, 2011
    Publication date: September 26, 2013
    Applicant: National University of Singapore
    Inventors: Hansong Cheng, Guo Qin Xu
  • Publication number: 20030196989
    Abstract: A method for forming a copper containing microelectronic structure. There is first provided a substrate. There is then formed over the substrate a copper containing microelectronic structure comprising a copper containing layer and a non-copper containing layer, where the non-copper containing layer has formed thereupon a copper containing residue. Finally, there is then stripped from the non-copper containing layer the copper containing residue while employing a stripper composition comprising a non-aqueous coordinating solvent and a halogen radical producing specie. Additionally, the copper so dissolved may be recovered from a non-aqueously solvated copper halide compound dissolved within the non-aqueous solvent.
    Type: Application
    Filed: June 10, 2003
    Publication date: October 23, 2003
    Applicant: CHARTERED SEMICONDUCTOR MANUFACTURING LTD.
    Inventors: Mei Sheng Zhou, Simon Chooi, Guo Qin Xu
  • Patent number: 6251781
    Abstract: A method of fabricating single and dual damascene copper interconnects is achieved. A semiconductor substrate layer is provided. Conductive traces are provided in an isolating dielectric layer. An intermetal dielectric layer is deposited overlying the conductive traces and the isolating dielectric layer. The intermetal dielectric layer is patterned to form trenches to expose the top surfaces of the underlying conductive traces. A barrier layer is deposited overlying the intermetal dielectric layer, the exposed conductive traces, and within the trenches. A platinum ionic seed solution is coated inside the trenches and overlying the barrier layer. A platinum seed layer is deposited from the ionic seed solution by exposing the platinum ionic seed solution to ultraviolet light.
    Type: Grant
    Filed: August 16, 1999
    Date of Patent: June 26, 2001
    Assignees: Chartered Semiconductor Manufacturing Ltd., National University of Singapore
    Inventors: Mei Sheng Zhou, Guo-Qin Xu, Lap Chan