Abstract: The present disclosure teaches a power module that includes a chip, a first substrate, and one or more electrically conductive inserts disposed between the chip and the first substrate. The inserts can be corrugated metal sheets, metal tubes, metal wires, or metal rods. One or more of those inserts form a layer in the planar direction of a first interstitial space between the chip and the first substrate.

Abstract: A paste including metal or metal alloy particles (which are preferably silver or silver alloy), a dispersant material, and a binder is used to form an electrical, mechanical or thermal interconnect between a device and a substrate. By using nanoscale particles (i.e., those which are less than 500 nm in size and most preferably less than 100 nm in size), the metal or metal alloy particles can be sintered at a low temperature to form a metal or metal alloy layer which is desired to allow good electrical, thermal and mechanical bonding, yet the metal or metal alloy layer can enable usage at a high temperature such as would be desired for SiC, GaN, or diamond (e.g., wide bandgap devices). Furthermore, significant application of pressure to form the densified layers is not required, as would be the case with micrometer sized particles.

Abstract: A paste including metal or metal alloy particles (which are preferably silver or silver alloy), a dispersant material, and a binder is used to form an electrical, mechanical or thermal interconnect between a device and a substrate. By using nanoscale particles (i.e., those which are less than 500 nm in size and most preferably less than 100 nm in size), the metal or metal alloy particles can be sintered at a low temperature to form a metal or metal alloy layer which is desired to allow good electrical, thermal and mechanical bonding, yet the metal or metal alloy layer can enable usage at a high temperature such as would be desired for SiC, GaN, or diamond (e.g., wide bandgap devices). Furthermore, significant application of pressure to form the densified layers is not required, as would be the case with micrometer sized particles.

Abstract: Gold suspensions with high concentrations of gold, and silver suspensions with high concentrations of silver, are provided. Gold or silver nanoparticles are put into suspension, where the metal nanoparticles are paired with silica. Biocompatible suspensions are one application. Noble metal particles, attached to the surface of silica particles, form a stable, non-agglomerated suspension due to the steric and repulsive properties of the silica particles. The noble metal particles are prepared by activating the surface of the silica particles and erecting nucleation sites for metal particle growth, and then growing the metal particles at the nucleation sites through a reduction procedure.

Abstract: A paste including metal or metal alloy particles (which are preferably silver or silver alloy), a dispersant material, and a binder is used to form an electrical, mechanical or thermal interconnect between a device and a substrate. By using nanoscale particles (i.e., those which are less than 500 nm in size and most preferably less than 100 nm in size), the metal or metal alloy particles can be sintered at a low temperature to form a metal or metal alloy layer which is desired to allow good electrical, thermal and mechanical bonding, yet the metal or metal alloy layer can enable usage at a high temperature such as would be desired for SiC, GaN, or diamond (e.g., wide bandgap devices). Furthermore, significant application of pressure to form the densified layers is not required, as would be the case with micrometer sized particles.

Abstract: Methods of attaching high-temperature electrical components to substrates are provided. The methods involve of attachment of high-temperature components to substrates via a nano-metal film.

Abstract: Resistance and parasitic inductance resulting from interconnection of semiconductor chips in power modules are reduced to negligible levels by a robust structure which completely avoids use of wire bonds through use of ball bonding and flip-chip manufacturing processes, possibly in combination with chip scale packaging and hourglass shaped stacked solder bumps of increased compliance and controlled height/shape. Turn-off voltage overshoot is reduced to about one-half or less than a comparable wire bond packaged power module. Hourglass shaped solder bumps provide increased compliance and reliability over much increased numbers of thermal cycles over wide temperature excursions.

Abstract: A conductive layer having a plurality dimples is provided for interconnecting a power device chip and a driver circuit for driving and controlling the power device chip within a power module. A plurality of concave-shaped dimples of the conductive layer form an electrical contact with the power device chip, and at least one convex-shaped dimple of the conductive layer forms an electrical contact with the driver circuit. Optionally, a group of through-holes are formed around each of the dimples.

Abstract: Processes for providing a durable glass dielectric layer on an electrically conductive substrate are disclosed. Also disclosed are electrostatic chucks made by the process that include an electrically conductive substrate coated with a layer of glass having a composition that includes 60 wt. % to 80 wt. % SiO.sub.2.

Abstract: Tubelining device and technique using a coating-applicator for slip-casting a fluent liner coating onto the internal surface of a tube.