Abstract: Provided are a demultiplexer circuit, an array substrate, a display panel and device, and a driving method. The demultiplexer circuit includes multiple demultiplexers, each demultiplexer includes at least two switching transistor groups, and each switching transistor group includes at least two switching transistors. Sources of the at least two switching transistors in a same switching transistor group are electrically connected to each other, drains of the at least two switching transistors in the same switching transistor group are electrically connected to each other. Input ends of the at least two switching transistor groups in a same demultiplexer are electrically connected to each other. In the same switching transistor group, the common source is electrically connected to the input end, the common drain is electrically connected to the output end, and at least two control ends are electrically connected to gates of the switching transistors in a one-to-one correspondence.

Abstract: A display panel, a flexible circuit board and a display device are provided. The display panel includes a substrate, and at least one row of a plurality of input pads including at least one first-input pad disposed in the middle of the input pads and a plurality of second-input pads disposed on both sides of the first input pad. Each input pad includes a first end and a second end that are oppositely disposed, and a spacing between any adjacent two input pads includes a first spacing between adjacent two first ends and a second spacing between adjacent two second ends. The first spacing and the second spacing between any adjacent two second-input pads are not equal. Along a direction from the first-input pad to the second-input pad, starting from adjacent first-input and second-input pads, the first spacing and the second spacing successively and gradually increases, respectively.

Abstract: Provided are a display panel and a display device. The display panel includes a display area and a non-display area surrounding the display area, the display area includes a first rectangular area and a first special-shaped area disposed adjacent to the first rectangular area, and the non-display area includes a second rectangular area adjacent to the first rectangular area and a second special-shaped area adjacent to the first special-shaped area. The display area includes pixel units arranged in an array, and a plurality of shift registers are disposed in the second rectangular area and the second special-shaped area, where each of the plurality of shift registers is connected to a row of pixel units. The second special-shaped area includes a laser cutting affected area, where none of the plurality of shift registers is disposed in at least part of the laser cutting affected area.

Abstract: An array substrate and a display panel are provided. The array substrate includes a non-display area and a display area. The non-display area includes a first non-display area and a second non-display area, and the display area includes a normal display area and a wiring area. The normal display area is surrounded by the first non-display area, the wiring area is surrounded by the normal display area, and the second non-display area is surrounded by the wiring area. The second non-display area comprises an opening area. In the solution, since the number of data lead lines in the same layer in the wiring area is reduced, a line distance between adjacent data lead lines is increased, thereby reducing coupling capacitance between adjacent data lead lines arranged in the same layer.

Abstract: Provided are an array substrate, a display panel and a display device. The array substrate includes a base substrate, and a plurality of first signal lines and a plurality of second signal lines insulated from each other on a side of the base substrate. When some of the plurality of first signal lines extend to the wiring region, the wiring of which is configured to be around the assembly setting area and forms a first signal line concentrated region, and a first signal line passing through the wiring region includes a first signal line body portion and a first signal line winding portion. When some of the plurality of second signal lines extend to the wiring region, the wiring of which is configured to be around the assembly setting area and forms a second signal line concentrated region.

Abstract: A display panel and a display device are provided. The display panel includes a first substrate having a step area; a second substrate disposed opposite to the first substrate, wherein the second substrate has a first surface facing the first substrate and an opposite second surface; a Chip On Flex (COF) disposed on the step area of the first substrate and including at least one ground pad; a conductive layer disposed on the second surface of the second substrate; and a conductive adhesive electrically connected to the conductive layer and the at least one ground pad.

Abstract: An array substrate, a display panel and a display device, including at least two gate lines in a display area, a gate driving circuit and at least two gate fan-out lines in a non-display are described. One end of each of the gate fan-out lines are electrically connected with one signal output of the gate driving circuit and the other end of each of the gate fan-out lines are electrically connected with the gate lines. By configuring a first gate fan-out line of the gate fan-out lines and the gate driving circuit to have an overlapping area outside a mutual connection area, an area where the gate fan-out lines are overlaps the gate driving circuit, space occupied by the first gate fan-out line outside the gate driving circuit is decreased to shorten a distance between the gate driving circuit and the display area.

Abstract: An array substrate and a display panel are provided. The array substrate includes a non-display area and a display area. The non-display area includes a first non-display area and a second non-display area, and the display area includes a normal display area and a wiring area. The normal display area is surrounded by the first non-display area, the wiring area is surrounded by the normal display area, and the second non-display area is surrounded by the wiring area. The second non-display area comprises an opening area. In the solution, since the number of data lead lines in the same layer in the wiring area is reduced, a line distance between adjacent data lead lines is increased, thereby reducing coupling capacitance between adjacent data lead lines arranged in the same layer.

Abstract: A display panel and a display device are provided. The display panel includes a first substrate having a step area; a second substrate disposed opposite to the first substrate, wherein the second substrate has a first surface facing the first substrate and an opposite second surface; a Chip On Flex (COF) disposed on the step area of the first substrate and including at least one ground pad; a conductive layer disposed on the second surface of the second substrate; and a conductive adhesive electrically connected to the conductive layer and the at least one ground pad.

Abstract: A display panel and a display device are provided. The display panel comprises a first substrate having a step area; a second substrate disposed opposite to the first substrate, wherein the second substrate has a first surface facing the first substrate and an opposite second surface; a Chip On Flex (COF) disposed on the step area of the first substrate and comprising at least one ground pad, wherein the COF has a first surface facing the first substrate and an opposite second surface, and the at least one ground pad is disposed on the second surface of the COF; a conductive layer disposed on the second surface of the second substrate; and a conductive adhesive electrically connected to the conductive layer and the at least one ground pad.

Abstract: An array substrate, a display panel and a display device, including at least two gate lines in a display area, a gate driving circuit and at least two gate fan-out lines in a non-display are described. One end of each of the gate fan-out lines are electrically connected with one signal output of the gate driving circuit and the other end of each of the gate fan-out lines are electrically connected with the gate lines. By configuring a first gate fan-out line of the gate fan-out lines and the gate driving circuit to have an overlapping area outside a mutual connection area, an area where the gate fan-out lines are overlaps the gate driving circuit, space occupied by the first gate fan-out line outside the gate driving circuit is decreased to shorten a distance between the gate driving circuit and the display area.

Abstract: A display panel and a display device are provided. The display panel comprises a first substrate having a step area; a second substrate disposed opposite to the first substrate, wherein the second substrate has a first surface facing the first substrate and an opposite second surface; a Chip On Flex (COF) disposed on the step area of the first substrate and comprising at least one ground pad, wherein the COF has a first surface facing the first substrate and an opposite second surface, and the at least one ground pad is disposed on the second surface of the COF; a conductive layer disposed on the second surface of the second substrate; and a conductive adhesive electrically connected to the conductive layer and the at least one ground pad.