Patents by Inventor Guojing Cong
Guojing Cong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11665087Abstract: A computer-implemented method, a computer program product, and a computer system for multi-path networking with a feature of multiplexing. One or more computing devices or servers configure wrappers for respective ones of applications and run the applications with the wrappers preloaded to the respective ones of the applications. The wrappers establish communication through one or more alternative paths between wrapped applications, where the one or more alternative paths are parallel to an original path between the applications. The wrappers exchange data between the applications through either the one or more alternative paths or the original path. The wrappers finalize connections through the one or more alternative paths, in response to all the data being exchanged.Type: GrantFiled: September 15, 2021Date of Patent: May 30, 2023Assignee: International Business Machines CorporationInventors: Nelson Mimura Gonzalez, Tonia Elengikal, Guojing Cong
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Publication number: 20230079088Abstract: A computer-implemented method, a computer program product, and a computer system for multi-path networking with a feature of multiplexing. One or more computing devices or servers configure wrappers for respective ones of applications and run the applications with the wrappers preloaded to the respective ones of the applications. The wrappers establish communication through one or more alternative paths between wrapped applications, where the one or more alternative paths are parallel to an original path between the applications. The wrappers exchange data between the applications through either the one or more alternative paths or the original path. The wrappers finalize connections through the one or more alternative paths, in response to all the data being exchanged.Type: ApplicationFiled: September 15, 2021Publication date: March 16, 2023Inventors: Nelson Mimura Gonzalez, Tonia Elengikal, Guojing Cong
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Publication number: 20220230702Abstract: A computer-implemented method for executing a computation task in a molecular dynamic simulation includes identifying a bonding target on a ligand; constructing a protein structure; rendering an image of the ligand; subsampling data pertaining to the constructed protein structure and the image of the ligand at a particular frequency; rendering a two-dimensional image of the constructed protein structure relative to the ligand from a plurality of viewpoints; computing optical flows of the protein structure relative to the ligand based on the two-dimensional image; analyzing the optical flows to determine a displacement of atoms; simulating a binding state outcome of the protein structure relative to the ligand for each of the plurality of viewpoints; and predicting a probability of the protein structure binding with the ligand, based on the predicted binding state outcome for each of the plurality of viewpoints.Type: ApplicationFiled: January 21, 2021Publication date: July 21, 2022Inventors: Giacomo Domeniconi, Leili Zhang, Guojing Cong, Chih-Chieh Yang, Ruhong Zhou
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Publication number: 20220199204Abstract: A method of finding an unknown molecular dynamics state includes receiving input molecular dynamics simulation data, determining a current layer of data from the input molecular dynamics simulation data, separating abnormal data from the current layer of data, extracting a targeted state using the abnormal data, and separating targeted state data from the current layer of data using the targeted stateType: ApplicationFiled: December 18, 2020Publication date: June 23, 2022Inventors: Eun Kyung Lee, Sara Kokkila Schumacher, Nicolas Dupuis, Guojing Cong
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Patent number: 11354595Abstract: Original data for machine learning training can be received. The original data can be divided into baseline data and difference data. The baseline data and the difference data can be stored in different memory devices of the memory hierarchy associated with a computer, wherein the baseline data is stored in a first memory device having faster access speed than a second memory device in which the difference data is stored. The baseline data and the difference data can be loaded from the different memory devices. The original data can be reconstructed from the baseline data and the difference data. The reconstructed original data can be fed to a machine learning model to train the machine learning model.Type: GrantFiled: April 1, 2020Date of Patent: June 7, 2022Assignee: International Business Machines CorporationInventors: Eun Kyung Lee, Guojing Cong, Chih-Chieh Yang
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Publication number: 20220115086Abstract: Altering protein-ligand structures by generating molecular trajectory data for a protein-ligand structure, determining a molecular level binding affinity according to the molecular trajectory data, determining an atom level binding affinity for a first atom of the protein-ligand structure according to the molecular trajectory data, determining a correlation between the atom level and the molecular level binding affinities, and altering the protein-ligand structure according to the correlation.Type: ApplicationFiled: October 8, 2020Publication date: April 14, 2022Inventors: Giacomo Domeniconi, Leili Zhang, Guojing Cong, Chih-Chieh Yang, Ruhong Zhou
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Publication number: 20210312316Abstract: Original data for machine learning training can be received. The original data can be divided into baseline data and difference data. The baseline data and the difference data can be stored in different memory devices of the memory hierarchy associated with a computer, wherein the baseline data is stored in a first memory device having faster access speed than a second memory device in which the difference data is stored. The baseline data and the difference data can be loaded from the different memory devices. The original data can be reconstructed from the baseline data and the difference data. The reconstructed original data can be fed to a machine learning model to train the machine learning model.Type: ApplicationFiled: April 1, 2020Publication date: October 7, 2021Inventors: Eun Kyung Lee, Guojing Cong, Chih-Chieh Yang
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Patent number: 11093862Abstract: A data index sequence indexing a dataset is received. A location of a data sample identified by a data index in the data index sequence is determined. A scheme is generated for specifying a data movement based on the location. Responsive to determining that the location is a cache of a process, the data sample in the cache can be reused without having to load the data sample from a storage device.Type: GrantFiled: March 21, 2019Date of Patent: August 17, 2021Assignee: International Business Machines CorporationInventors: Chih-Chieh Yang, Guojing Cong, Bilge Acun, Alessandro Morari
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Publication number: 20200302334Abstract: A data index sequence indexing a dataset is received. A location of a data sample identified by a data index in the data index sequence is determined. A scheme is generated for specifying a data movement based on the location. Responsive to determining that the location is a cache of a process, the data sample in the cache can be reused without having to load the data sample from a storage device.Type: ApplicationFiled: March 21, 2019Publication date: September 24, 2020Inventors: Chih-Chieh Yang, Guojing Cong, Bilge Acun, Alessandro Morari
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Patent number: 9785422Abstract: A system and method for applying multiple rewritings without contention in a semi-automatic program rewriting system. The method includes: finding dependent ranges of a variable and a modification affecting range of the variable in a target program; determining at least two solutions for target program modification; detecting whether a collision condition exists amongst the one or more solutions; and modifying the program with said one or more solutions if no collision condition exists, while disabling the other solution if a collision condition is detected. A solution includes a rewriting of a segment of a target program code, and there is performed applying one or both of: multiple rewritings in a single solution and multiple rewritings in multiple regions of the target program. When multiple solutions are applied, the second and later solutions are applied to the already rewritten program. The correct application regions of the second and later solutions are identified.Type: GrantFiled: October 31, 2016Date of Patent: October 10, 2017Assignee: International Business Machines CorporationInventors: Guojing Cong, Hiroki Murata, Yasushi Negishi
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Patent number: 8898648Abstract: A profiling tool identifies a code region with a false sharing potential. A static analysis tool classifies variables and arrays in the identified code region. A mapping detection library correlates memory access instructions in the identified code region with variables and arrays in the identified code region while a processor is running the identified code region. The mapping detection library identifies one or more instructions at risk, in the identified code region, which are subject to an analysis by a false sharing detection library. A false sharing detection library performs a run-time analysis of the one or more instructions at risk while the processor is re-running the identified code region. The false sharing detection library determines, based on the performed run-time analysis, whether two different portions of the cache memory line are accessed by the generated binary code.Type: GrantFiled: November 30, 2012Date of Patent: November 25, 2014Assignee: International Business Machines CorporationInventors: I-Hsin Chung, Guojing Cong, Hiroki Murata, Yasushi Negishi, Hui-Fang Wen
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Patent number: 8869155Abstract: A method for increasing performance of an operation on a distributed memory machine is provided. Asynchronous parallel steps in the operation are transformed into synchronous parallel steps. The synchronous parallel steps of the operation are rearranged to generate an altered operation that schedules memory accesses for increasing locality of reference. The altered operation that schedules memory accesses for increasing locality of reference is mapped onto the distributed memory machine. Then, the altered operation is executed on the distributed memory machine to simulate local memory accesses with virtual threads to check cache performance within each node of the distributed memory machine.Type: GrantFiled: November 12, 2010Date of Patent: October 21, 2014Assignee: International Business Machines CorporationInventors: George Almasi, Guojing Cong, David J. Klepacki, Vijay A. Saraswat
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Patent number: 8819346Abstract: A computer implemented method analyzes shared memory accesses during execution of an application program. The method includes instrumenting events of shared memory accesses in the application program, where the application program is to be executed on a target configuration having p nodes; executing the application program using p1 processing nodes, where p1 is less than p and satisfies a constraint. For accesses made by the executing application program, the method determines a target thread and maps determined target threads to either a remote node or a local node corresponding to a remote memory access and to a local memory access, respectively. Also disclosed is a computer-readable storage medium that stores a program of executable instructions that implements the method, and a data processing system. The invention can be implemented using a language such as Unified Parallel C (UPC) directed to a partitioned global address space (PGAS) paradigm.Type: GrantFiled: March 9, 2012Date of Patent: August 26, 2014Assignee: International Business Machines CorporationInventors: Guojing Cong, Ettore Tiotto, Hui-Fang Wen
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Publication number: 20130238862Abstract: A computer implemented method analyzes shared memory accesses during execution of an application program. The method includes instrumenting events of shared memory accesses in the application program, where the application program is to be executed on a target configuration having p nodes; executing the application program using p1 processing nodes, where p1 is less than p and satisfies a constraint. For accesses made by the executing application program, the method determines a target thread and maps determined target threads to either a remote node or a local node corresponding to a remote memory access and to a local memory access, respectively. Also disclosed is a computer-readable storage medium that stores a program of executable instructions that implements the method, and a data processing system. The invention can be implemented using a language such as Unified Parallel C (UPC) directed to a partitioned global address space (PGAS) paradigm.Type: ApplicationFiled: March 9, 2012Publication date: September 12, 2013Applicant: International Business Machines CorporationInventors: Guojing Cong, Ettore Tiotto, Hui-Fang Wen
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Patent number: 8490061Abstract: During runtime of a binary program file, streams of instructions are executed and memory references, generated by instrumentation applied to given ones of the instructions that refer to memory locations, are collected. A transformation is performed, based on the executed streams of instructions and the collected memory references, to obtain a table. The table lists memory events of interest for active data structures for each function in the program file. The transformation is performed to translate memory addresses for given ones of the instructions and given ones of the data structures into locations and variable names in a source file corresponding to the binary file. At least the memory events of interest are displayed, and the display is organized so as to correlate the memory events of interest with corresponding ones of the data structures.Type: GrantFiled: May 7, 2009Date of Patent: July 16, 2013Assignee: International Business Machines CorporationInventors: I-Hsin Chung, Guojing Cong, Kattamuri Ekanadham, David Klepacki, Simone Sbaraglia, Hui-Fang Wen
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Patent number: 8327325Abstract: A target application is automatically tuned. A list of solutions for identified performance bottlenecks in a target application is retrieved from a storage device. A plurality of modules is executed to compute specific parameters for solutions contained in the list of solutions. A list of modification commands associated with specific parameters computed by the plurality of modules is generated. The list of modification commands associated with the specific parameters is appended to a command sequence list. The list of modification commands is implemented in the target application. Specific source code regions corresponding to the identified performance bottlenecks in the target application are automatically tuned using the implemented list of modification commands. Then, the tuned target application is stored in the storage device.Type: GrantFiled: January 14, 2009Date of Patent: December 4, 2012Assignee: International Business Machines CorporationInventors: I-Hsin Chung, Guojing Cong, David J. Klepacki, Simone Sbaraglia, Seetharami R. Seelam, Hui-Fang Wen
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Patent number: 8225291Abstract: Detecting performance bottlenecks in a target application is provided. In response to receiving hotspot selections from a user interface, bottleneck rules are extracted from a database. A hotspot is a region of source code that exceeds a time threshold to execute in the target application. Metrics needed to evaluate the bottleneck rules extracted from the database are identified. The identified metrics are computed. It is determined whether each bottleneck rule extracted from the database is evaluated to true using the computed metrics for hotspots in the target application. In response to determining that a bottleneck rule is evaluated to true using an appropriate computed metric corresponding to the bottleneck rule, a bottleneck description is created for the bottleneck rule. Then, the bottleneck description is sent to the user interface.Type: GrantFiled: January 4, 2008Date of Patent: July 17, 2012Assignee: International Business Machines CorporationInventors: I-Hsin Chung, Guojing Cong, David Joseph Klepacki, Simone Sbaraglia, Seetharami R. Seelam, Hui-Fang Wen
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Patent number: 8214806Abstract: A method for profiling performance of a system includes steps of: monitoring execution of the system at multiple points during the system's operation; analyzing results derived from the monitoring in order to provide analyzed results; reconfiguring the monitoring non-uniformly according to the analyzed results; and repeatedly performing iterations of the above steps until a particular event occurs. The iterations may be terminated upon: reaching a specified level of analysis precision, determining a source of one or more performance bottlenecks, determining a source of unexpectedly high output or low completion time, completing a predefined number of iterations, reaching an endpoint of an application, or having performed iterations for a specified period of time.Type: GrantFiled: May 9, 2007Date of Patent: July 3, 2012Assignee: International Business Machines CorporationInventors: Guojing Cong, Peter Kenneth Malkin
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Publication number: 20120124585Abstract: A method for increasing performance of an operation on a distributed memory machine is provided. Asynchronous parallel steps in the operation are transformed into synchronous parallel steps. The synchronous parallel steps of the operation are rearranged to generate an altered operation that schedules memory accesses for increasing locality of reference. The altered operation that schedules memory accesses for increasing locality of reference is mapped onto the distributed memory machine. Then, the altered operation is executed on the distributed memory machine to simulate local memory accesses with virtual threads to check cache performance within each node of the distributed memory machine.Type: ApplicationFiled: November 12, 2010Publication date: May 17, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: George Almasi, Guojing Cong, David J. Klepacki, Vijay A. Saraswat
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Publication number: 20100287536Abstract: During runtime of a binary program file, streams of instructions are executed and memory references, generated by instrumentation applied to given ones of the instructions that refer to memory locations, are collected. A transformation is performed, based on the executed streams of instructions and the collected memory references, to obtain a table. The table lists memory events of interest for active data structures for each function in the program file. The transformation is performed to translate memory addresses for given ones of the instructions and given ones of the data structures into locations and variable names in a source file corresponding to the binary file. At least the memory events of interest are displayed, and the display is organized so as to correlate the memory events of interest with corresponding ones of the data structures.Type: ApplicationFiled: May 7, 2009Publication date: November 11, 2010Applicant: International Business Machiness CorporationInventors: I-Hsin Chung, Guojing Cong, Kattamuri Ekanadham, David Klepacki, Simone Sbaraglia, Hui-Fang Wen