Abstract: A whole-vehicle-based method for evaluating extreme pressure and antiwear properties of grease includes injecting the grease onto a key bearing pin and causing the engineering machine to operate without load is disclosed. The method includes causing the engineering machine to operate under a load of 10% to 150% rated load at least once, viewing and analyzing a wear condition of a surface of the bearing pin, and issuing a whole-vehicle-based evaluation report of extreme pressure and antiwear properties of grease. The engineering machine is caused to operate once under a load of 10% to 150% rated load for 0.5 min to 100 h.

Abstract: An impact-resistant balanced hydro-cylinder with pressure relief and buffering protection comprises a cylinder body (11), a piston (13), a piston rod (14), and a first valve core (21) and a second valve core (51) slidable relative to the cylinder body (11). A closed first gas cavity (22) and a closed second gas cavity (52) are respectively formed between the two valve cores and inner walls of two opposite ends of the cylinder body (11). A closed first oil cavity (32) and a closed second oil cavity (42) are respectively formed between the two valve cores and two end faces of the piston (13). A through hole (33) for the first oil cavity and a through hole (43) for the second oil cavity are respectively provided in the positions on the cylinder body (11) corresponding to the first oil cavity (32) and the second oil cavity (42).

Abstract: The present invention belongs to the technical field of gate driving circuits, and discloses a partially bootstrapped gate driving circuit for reducing switching loss and a control method thereof. The partially bootstrapped gate driving circuit for reducing the switching loss comprises a switching device, PWM, a power supply, signal isolation, non-isolated driving chips, a bootstrap structure, a driving resistor, Mon and Moff. The bootstrap structure is used in the present invention, which can realize voltage doubling output without increasing the power supply, overcomes limitation of parasitic resistance inside a large gate of a wide band gap device, and can significantly reduce the switching loss.

Abstract: The present invention belongs to the technical field of simulation of power semiconductor modules, and discloses a multi-physics co-simulation method of a power semiconductor module. The multi-physics co-simulation method of the power semiconductor module comprises: adopting professional circuit simulation software PSpice supporting a spice model to be imported into a device, and by designing a specific collaborative analysis method and performing secondary development of a software data exchange interface, i.e. constructing a coupling interface of co-simulation, performing electricity-heat-force co-simulation of two types of software PSpice and COMSOL by adopting an indirect coupling manner. The simulation time is greatly shortened, and the simulation efficiency is improved.

Abstract: Embodiments of the invention relate generally to graphene fibers and, more particularly, to graphene fibers comprising intercalated large-sized graphene oxide (LGGO)/graphene sheets and small-sized graphene oxide (SMGO)/graphene sheets having high thermal and electrical conductivities and high mechanical strength. In one embodiment, the invention provides a graphene fiber comprising: a plurality of intercalated graphene sheets including: a plurality of large-sized graphene sheets; and a plurality of small-sized graphene sheets, wherein at least one of the plurality of small-sized graphene sheets is disposed between at least two of the plurality of large-sized graphene sheets.

Abstract: Embodiments of the invention relate generally to graphene fibers and, more particularly, to graphene fibers comprising intercalated large-sized graphene oxide (LGGO)/graphene sheets and small-sized graphene oxide (SMGO)/graphene sheets having high thermal and electrical conductivities and high mechanical strength. In one embodiment, the invention provides a graphene fiber comprising: a plurality of intercalated graphene sheets including: a plurality of large-sized graphene sheets; and a plurality of small-sized graphene sheets, wherein at least one of the plurality of small-sized graphene sheets is disposed between at least two of the plurality of large-sized graphene sheets.