Patents by Inventor Guo-Wei Chen

Guo-Wei Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10678984
    Abstract: The available delivery capability (ADC) of a power distribution network with respect to a power transaction is evaluated in real-time. The power transaction involves simultaneous power deliveries from power sources in a source area to loads in a sink area. First, a list of contingencies are ranked in the power distribution network with respect to static security constraints to obtain a subset of top-ranked contingencies. For each top-ranked contingency in the subset, a representation of the power transaction in a steady state of the power distribution network, in a form of parameterized three-phase power flow equations, is solved to obtain a corresponding power delivery capability (PDC) and a corresponding binding constraint among the static security constraints. The reliability of the power transaction in the power distribution network is then evaluated based on, at least in part, a first contingency PDC which is a smallest PDC among obtained corresponding PDCs.
    Type: Grant
    Filed: April 26, 2017
    Date of Patent: June 9, 2020
    Assignees: Bigwood Technology, Inc., State Grid Xiamen Electric Power Supply Company, ShanDong Global Optimal Big Data Science and Tech, Tianjin University
    Inventors: Hsiao-Dong Chiang, Sheng Hao, Wen-Liang Liu, Jun Xiong, Jin-Xiang Chen, Guo-Wei Chen, Yong-Feng Zhang, Gilburt Chiang
  • Publication number: 20160276215
    Abstract: A method for manufacturing a semiconductor device is provided. The method comprises steps as follows. At least one trench is provided in a low-k dielectric layer on a substrate. The trench is filled with a copper (Cu) film. Pure cobalt (Co) is deposited on a surface of the Cu film by introducing a flow of a carrier gas carrying a Co-containing precursor and a reducing agent onto the surface of the Cu film. The flowrate of the flow is within a range from 5 to 19 sccm.
    Type: Application
    Filed: March 18, 2015
    Publication date: September 22, 2016
    Applicant: UNITED MICROELECTRONICS CORPORATION
    Inventors: PEI-TING LEE, GUO-WEI CHEN, CHUN-LING LIN, CHI-MAO HSU, CHING-WEI HSU, HUEI-RU TSAI, JIA-RONG LI, SHANG NAN CHOU, PO CHIH WU
  • Publication number: 20150093893
    Abstract: In a process of forming a seed layer, particularly in a vertical trench or via, a semiconductor substrate having a dielectric structure and a hard mask structure thereon is provided. An opening is formed in the hard mask structure, and a trench or via is formed in the dielectric structure in communication with the opening, wherein an area of the opening is greater than that of an entrance of the trench or via. A seed layer is then deposited in the trench or via through the opening, and then subjected to a reflow process.
    Type: Application
    Filed: October 2, 2013
    Publication date: April 2, 2015
    Applicant: UNITED MICROELECTRONICS CORPORATION
    Inventors: Yi-Fang Tao, Ching-Wei Hsu, Hsin-Yu Chen, Tsun-Min Cheng, Yung-Chien Kung, Chi-Mao Hsu, Guo-Wei Chen, Huei-Ru Tsai, Jia-Rong Li