Patents by Inventor Guoyi ZONG

Guoyi ZONG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9466388
    Abstract: A readout circuit with a self-detection circuit and a control method therefor. The circuit comprises a pre-charging circuit and a control circuit, the pre-charging circuit and the control circuit being connected to a first node and used for charging a memory unit. The readout circuit also comprises a detection circuit, the detection circuit and the pre-charging circuit being connected to the first node. The detection circuit comprises a third NOT gate, a fourth NOT gate, a first NAND gate, a sixth NOT gate, a first trigger and an eighth NOT gate. In such a manner of detecting the reversal of the first NOT gate through the reversal of the third NOT gate, the charging duration of the first node (A) can be greatly reduced, thereby reducing the reading duration of the whole circuit. At the same time, the re-occurrence of a state of charging the circuit can be avoided after pre-charging has ended.
    Type: Grant
    Filed: October 10, 2014
    Date of Patent: October 11, 2016
    Assignee: CSMC Technologies Fabl Co., Ltd.
    Inventors: Shuming Guo, Guoyi Zong
  • Publication number: 20160232980
    Abstract: A readout circuit with a self-detection circuit and a control method therefor. The circuit comprises a pre-charging circuit and a control circuit, the pre-charging circuit and the control circuit being connected to a first node and used for charging a memory unit. The readout circuit also comprises a detection circuit, the detection circuit and the pre-charging circuit being connected to the first node. The detection circuit comprises a third NOT gate, a fourth NOT gate, a first NAND gate, a sixth NOT gate, a first trigger and an eighth NOT gate. In such a manner of detecting the reversal of the first NOT gate through the reversal of the third NOT gate, the charging duration of the first node (A) can be greatly reduced, thereby reducing the reading duration of the whole circuit. At the same time, the re-occurrence of a state of charging the circuit can be avoided after pre-charging has ended.
    Type: Application
    Filed: October 10, 2014
    Publication date: August 11, 2016
    Applicant: CSMC TECHNOLOGIES FAB1 CO., LTD.
    Inventors: Shuming GUO, Guoyi ZONG