Patents by Inventor Gurdev Singh

Gurdev Singh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4891540
    Abstract: A spring support system for supporting a stator core (2) in a frame of an electrical machine, the core (2) having a longitudinal axis and an outer periphery provided with a plurality of circumferentially spaced, axially extending dovetail grooves (6), and the frame including a plurality of circular flanges (32) which surround the core (2) when the core (2) is installed in the frame, the system including:a plurality of key bars (8) each having a portion formed to mate with a respective dovetail groove (6) and each seated in a respective groove (6) of the core (2);a plurality of spring bars (34) each extending parallel to a respective key bar (8) and each secured to the flanges (32);a plurality of key blocks (20) for securing the key bars (8) to the spring bars (34); andfastening elements (26,40) mechanically fastening each key block (20) to a respective key bar (8) and to a respective spring bar (34) at a location between two axially adjacent flanges (32).
    Type: Grant
    Filed: November 1, 1988
    Date of Patent: January 2, 1990
    Assignee: Westinghouse Electric Corp.
    Inventors: Glenn D. Cooper, Felix M. Detinko, Gurdev Singh, Andre J. Levino
  • Patent number: 4415969
    Abstract: An instruction translator unit which receives an instruction stream from a main memory of a microprocessor, for latching data fields, for generating microinstructions necessary to emulate the function encoded in an instruction, and for transferring the data and microinstructions to a microinstruction execution unit over an output bus. The instruction unit includes an instruction decoder (ID) which interprets the fields of received instructions and generates single forced microinstructions and starting addresses of multiple-microinstruction routines. A microinstruction sequencer (MIS) accepts the forced microinstructions and the starting addresses and places on the output bus correct microinstruction sequences necessary to execute the received instruction. The microinstruction routines are stored in a read-only memory (ROM) in the MIS. The starting addresses received from the ID are used to index into and to fetch these microinstructions from the ROM.
    Type: Grant
    Filed: February 7, 1980
    Date of Patent: November 15, 1983
    Assignee: Intel Corporation
    Inventors: John A. Bayliss, Stephen R. Colley, Roy H. Kravitz, William S. Richardson, Dorn K. Wilde, Gurdev Singh
  • Patent number: 3987683
    Abstract: A poly-V-belt and pulley mechanism including a rib-and-groove tractive face belt for service as a transmission belt, conveyor belt or the like, and a pulley over which the belt is trained. The pulley has a spool with grooves and ribs to correspond to and mate with the rib-and-groove tractive surface of the belt and upwardly and outwardly diverging opposing side walls, each being curved convexly. This poly-V-belt and pulley mechanism provides for self-alignment of the ribs of the belt in the grooves of the pulley.
    Type: Grant
    Filed: September 3, 1974
    Date of Patent: October 26, 1976
    Assignee: General Electric Company
    Inventor: Gurdev Singh