Patents by Inventor Gurindar Singh Sohi

Gurindar Singh Sohi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Computer Architecture with Register Name Addressing and Dynamic Load Size Adjustment
    Publication number: 20230089349
    Abstract: A computer architecture allows load instructions to fetch from cache memory “fat” loads having more data than necessary to satisfy execution of the load instruction, for example, loading a full cache line instead of a required word. The fat load allows load instructions having spatiotemporal locality to share the data of the fat load avoiding cache accesses.
    Type: Application
    Filed: September 21, 2021
    Publication date: March 23, 2023
    Inventors: Gurindar Singh Sohi, Vanshika Baoni, Adarsh Mittal
  • Computer system and method for runtime control of parallelism in program execution
    Patent number: 9223674
    Abstract: A computer system and method are provided to assess a proper degree of parallelism in executing programs to obtain efficiency objectives, including but not limited to increases in processing speed or reduction in computational resource usage. This assessment of proper degree of parallelism may be used to actively moderate the requests for threads by application processes to control parallelism when those efficiency objectives would be furthered by this control.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: December 29, 2015
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: Srinath Sridharan, Gurindar Singh Sohi
  • Computer System and Method for Runtime Control of Parallelism in Program Execution
    Publication number: 20140259024
    Abstract: A computer system and method are provided to assess a proper degree of parallelism in executing programs to obtain efficiency objectives, including but not limited to increases in processing speed or reduction in computational resource usage. This assessment of proper degree of parallelism may be used to actively moderate the requests for threads by application processes to control parallelism when those efficiency objectives would be furthered by this control.
    Type: Application
    Filed: March 11, 2013
    Publication date: September 11, 2014
    Applicant: Wisconsin Alumni Research Foundation
    Inventors: Srinath Sridharan, Gurindar Singh Sohi
  • Data flow execution of methods in sequential programs
    Patent number: 7779230
    Abstract: Distant parallelization of sequential programs is obtained by making parallelization decisions at the boundaries between program methods (e.g., functions and sub-routines). Experimentation suggests that such a partitioning allows for large-scale parallelization without data flow conflicts.
    Type: Grant
    Filed: October 18, 2006
    Date of Patent: August 17, 2010
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: Saisanthosh Balakrishnan, Gurindar Singh Sohi
  • DATA FLOW EXECUTION OF METHODS IN SEQUENTIAL PROGRAMS
    Publication number: 20080098403
    Abstract: Distant parallelization of sequential programs is obtained by making parallelization decisions at the boundaries between program methods (e.g., functions and sub-routines). Experimentation suggests that such a partitioning allows for large-scale parallelization without data flow conflicts.
    Type: Application
    Filed: October 18, 2006
    Publication date: April 24, 2008
    Inventors: Saisanthosh Balakrishnan, Gurindar Singh Sohi