Patents by Inventor Guruprasad Ardhanari

Guruprasad Ardhanari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9288150
    Abstract: Class of service is supported over bonded lines by determining that packets of the same traffic class are to be sent over the same link and sending the packets over the same link without passing the packets through a fragmentation and reassembly layer.
    Type: Grant
    Filed: August 16, 2011
    Date of Patent: March 15, 2016
    Assignee: Lantiq Beteiligungs-GmbH & Co. KG
    Inventors: Guruprasad Ardhanari, Gert Schedelbeck
  • Publication number: 20120044918
    Abstract: Class of service is supported over bonded lines by determining that packets of the same traffic class are to be sent over the same link and sending the packets over the same link without passing the packets through a fragmentation and reassembly layer.
    Type: Application
    Filed: August 16, 2011
    Publication date: February 23, 2012
    Applicant: LANTIQ DEUTSCHLAND GMBH
    Inventors: Guruprasad Ardhanari, Gert Schedelbeck
  • Patent number: 7818327
    Abstract: A method of comparing unmasked bits of an N-bit data key to an N-bit Rule includes dividing the key into C-bit chunks. Each of the chunks is used as an 5 address to extract from memories 12, 13, 14, 21, 22, 23, 24, 31, 32, 33, 34, 41, 42, 43, 44. The memory is preprepared, such that the data stored in the address corresponding to that chunk of the key is 1 or O according to whether a bitwise comparison of that chunk of the data key with the mask is equal to a bitwise comparison of that chunk of the mask and rule. This extracted bit therefore indicates whether the rule is obeyed for that chunk of the data key. The N/C extracted bits for each rule are compared, to determine if the rule is obeyed for the entire data key.
    Type: Grant
    Filed: September 6, 2002
    Date of Patent: October 19, 2010
    Assignee: Infineon Technologies AG
    Inventors: Shridhar Mubaraq Mishra, Guruprasad Ardhanari
  • Patent number: 7778253
    Abstract: A preferred embodiment comprising a data switch includes a first processor for routing data packets including a MAC address, using a MAC address table stored in a writable memory. The switch further includes a second processor for routing data packets including an IP address using an IP address look-up table stored in the writable memory. The writable memory consists of a single memory fabric that is allocated between the MAC address table and the look-up table by a memory control unit according to a setting stored in a non-erasable memory unit.
    Type: Grant
    Filed: February 28, 2006
    Date of Patent: August 17, 2010
    Assignee: Infineon Technologies AG
    Inventors: Prashant Balakrishnan, Guruprasad Ardhanari
  • Patent number: 7688728
    Abstract: A method of controlling a data flow, a transmitter and a data transmission system are described. For example, in a method of controlling a data flow of a transmitter, first data is received at a first interface. The first data is buffered in a buffer. The first data is output via a second interface. Information is determined regarding an estimated amount of second data comprising payload data output via the first interface until a filling level of the buffer will reach a predetermined threshold. An amount of the payload data output via the first interface is adjusted based on the information. The payload data is then output via the first interface. Similarly, a transmitter includes an interface to output payload data and a control signal, and a buffer to buffer further data received via the interface wherein the control signal controls a flow of said further data.
    Type: Grant
    Filed: February 13, 2007
    Date of Patent: March 30, 2010
    Assignee: Infineon Technologies AG
    Inventors: Guruprasad Ardhanari, Raj Kumar Jain
  • Patent number: 7602713
    Abstract: A data switch includes ingress ports associated with ingress queues (3) and egress ports associated with egress queues (9). The length of the ingress queues (3) is measured, and the level of broadcast packets arriving at the ingress ports is thereby estimated. Based on this estimate it is determined whether or not the level of broadcast packets is excessive, and in this case broadcast storm control is carried out.
    Type: Grant
    Filed: September 2, 2002
    Date of Patent: October 13, 2009
    Assignee: Infineon Technologies AG
    Inventors: Shridhar Mubaraq Mishra, Guruprasad Ardhanari
  • Patent number: 7551558
    Abstract: A Ethernet switch 1 includes a monitoring unit 9 for policing the amount of traffic on each of a plurality of flows or groups of flows. The monitoring unit has a memory, implemented in hardware as a RAM memory, having a section of each of the flows or groups of flows, and acting as a token bucket for those flows or group of flows.
    Type: Grant
    Filed: September 6, 2002
    Date of Patent: June 23, 2009
    Assignee: Infineon Technologies AG
    Inventors: Shridhar Mubaraq Mishra, Pramod Kumar Pandey, Guruprasad Ardhanari
  • Publication number: 20080192631
    Abstract: A method of controlling a data flow, a transmitter and a data transmission system are described. For example, in a method of controlling a data flow of a transmitter, first data is received at a first interface. The first data is buffered in a buffer. The first data is output via a second interface. Information is determined regarding an estimated amount of second data comprising payload data output via the first interface until a filling level of the buffer will reach a predetermined threshold. An amount of the payload data output via the first interface is adjusted based on the information. The payload data is then output via the first interface. Similarly, a transmitter includes an interface to output payload data and a control signal, and a buffer to buffer further data received via the interface wherein the control signal controls a flow of said further data.
    Type: Application
    Filed: February 13, 2007
    Publication date: August 14, 2008
    Applicant: Infineon Technologies AG
    Inventors: Guruprasad Ardhanari, Raj Kumar Jain
  • Publication number: 20060164988
    Abstract: A Ethernet switch 1 includes a monitoring unit 9 for policing the amount of traffic on each of a plurality of flows or groups of flows. The monitoring unit has a memory, implemented in hardware as a RAM memory, having a section of each of the flows or groups of flows, and acting as a token bucket for those flows or group of flows.
    Type: Application
    Filed: September 6, 2002
    Publication date: July 27, 2006
    Inventors: Shridhar Mishra, Pramod Pandey, Guruprasad Ardhanari
  • Publication number: 20060146819
    Abstract: A preferred embodiment comprising a data switch includes a first processor for routing data packets including a MAC address, using a MAC address table stored in a writable memory. The switch further includes a second processor for routing data packets including an IP address using an IP address look-up table stored in the writable memory. The writable memory consists of a single memory fabric that is allocated between the MAC address table and the look-up table by a memory control unit according to a setting stored in a non-erasable memory unit.
    Type: Application
    Filed: February 28, 2006
    Publication date: July 6, 2006
    Inventors: Prashant Balakrishnan, Guruprasad Ardhanari
  • Publication number: 20060126550
    Abstract: A data switch includes ingress ports associated with ingress queues (3) and egress ports associated with egress queues (9). The length of the ingress queues (3) is measured, and the level of broadcast packets arriving at the ingress ports is thereby estimated. Based on this estimate it is determined whether or not the level of broadcast packets is excessive, and in this case broadcast storm control is carried out.
    Type: Application
    Filed: September 2, 2002
    Publication date: June 15, 2006
    Applicant: INFINEON TECNNOLOGIES AG
    Inventors: Shridhar Mishra, Guruprasad Ardhanari
  • Publication number: 20050262127
    Abstract: A method of comparing unmasked bits of an N-bit data key to an N-bit Rule includes dividing the key into C-bit chunks. Each of the chunks is used as an 5 address to extract from memories 12, 13, 14, 21, 22, 23, 24, 31, 32, 33, 34, 41, 42, 43, 44. The memory is preprepared, such that the data stored in the address corresponding to that chunk of the key is 1 or O according to whether a bitwise comparison of that chunk of the data key with the mask is equal to a bitwise comparison of that chunk of the mask and rule. This extracted bit therefore indicates whether the rule is obeyed for that chunk of the data key. The N/C extracted bits for each rule are compared, to determine if the rule is obeyed for the entire data key.
    Type: Application
    Filed: September 6, 2002
    Publication date: November 24, 2005
    Applicant: Infineon Technologies AG
    Inventors: Shridhar Mishra, Guruprasad Ardhanari