Patents by Inventor Gurvinder Singh
Gurvinder Singh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250006410Abstract: The present disclosure relates to magnetic nanoparticles having a core-multishell structure comprising at least two shells, and methods for their preparation.Type: ApplicationFiled: September 1, 2022Publication date: January 2, 2025Applicant: The University of SydneyInventors: Gurvinder Singh, Hala Zreiqat
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Publication number: 20250000562Abstract: Treatment systems, methods, and apparatuses for treating acne, hyperhidrosis, and other skin conditions are described. Aspects of the technology can include cooling a surface of a patient's skin and detecting changes in the tissue. The tissue can be cooled a sufficient length of time and to a temperature low enough to affect glands or other targeted structures in the skin.Type: ApplicationFiled: May 2, 2024Publication date: January 2, 2025Inventors: Leonard DeBenedictis, George Frangineas, JR., Kristine Tatsutani, Bryan J. Weber, Kerrie Jiang, Peter Yee, Linda Pham, Gurvinder Singh Nanda
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Publication number: 20240378253Abstract: A platform dynamically detects a user persona and facilitates a user objective in a user session. The platform obtains user activity of users across multiple historical sessions. The platform clusters similar user activity across the historical sessions to determine personas being used in the historical sessions. The platform mines sequential patterns in a set of user activity data associated with one of the personas and determines at least one predictive rule associated with that persona. Each predictive rule includes an initial activity among the set of user activity data and at least one subsequent activity in the set of user activity data.Type: ApplicationFiled: July 23, 2024Publication date: November 14, 2024Inventors: Qihong Shao, Josh Viktorov, Doosan Jung, Gurvinder Singh, Matthew R. Engle, David C. White, JR.
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Patent number: 12118049Abstract: A platform dynamically detects a user persona and facilitates a user objective in a user session. The platform obtains user activity of users across multiple historical sessions. The platform clusters similar user activity across the historical sessions to determine personas being used in the historical sessions. The platform mines sequential patterns in a set of user activity data associated with one of the personas and determines at least one predictive rule associated with that persona. Each predictive rule includes an initial activity among the set of user activity data and at least one subsequent activity in the set of user activity data.Type: GrantFiled: January 17, 2023Date of Patent: October 15, 2024Assignee: CISCO TECHNOLOGY, INC.Inventors: Qihong Shao, Josh Viktorov, Doosan Jung, Gurvinder Singh, Matthew R. Engle, David C. White, Jr.
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Patent number: 12058779Abstract: Disclosed herein is a method and system for utilizing a digital data capture device in conjunction with a Bluetooth (BT) enabled mobile device for publishing data and multimedia content on one or more websites automatically or with minimal user intervention. A client application is provided on the BT enabled mobile device. In the absence of inbuilt BT capability, a BT communication device is provided on the digital data capture device. The BT communication device is paired with the BT enabled mobile device to establish a connection. The client application detects capture of data and multimedia content on the digital data capture device and initiates transfer of the captured data, multimedia content, and associated files. The digital data capture device transfers the captured data, multimedia content, and the associated files to the client application. The client application automatically publishes the transferred data and multimedia content on one or more websites.Type: GrantFiled: March 31, 2023Date of Patent: August 6, 2024Assignee: CellSpinSoft Inc.Inventors: Gurvinder Singh, Marcos Klein, Vince Laviano
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Publication number: 20240241916Abstract: A platform dynamically detects a user persona and facilitates a user objective in a user session. The platform obtains user activity of users across multiple historical sessions. The platform clusters similar user activity across the historical sessions to determine personas being used in the historical sessions. The platform mines sequential patterns in a set of user activity data associated with one of the personas and determines at least one predictive rule associated with that persona. Each predictive rule includes an initial activity among the set of user activity data and at least one subsequent activity in the set of user activity data.Type: ApplicationFiled: January 17, 2023Publication date: July 18, 2024Inventors: Qihong Shao, Josh Viktorov, Doosan Jung, Gurvinder Singh, Matthew R. Engle, David C. White, JR.
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Publication number: 20240117208Abstract: Phosphor materials and devices containing such phosphor materials are disclosed. An ink composition of in accordance with the present disclosure comprises a phosphor material comprising a Mn4+ doped phosphor of formula 1, Ax[MFy]:Mn4+ (I), and at least one rare earth containing Garnet phosphor, the at least one rare earth Garnet phosphor is present in the phosphor material in an amount of at least about 80 wt % based on the weight of the phosphor material, wherein the at least one rare earth containing a Garnet phosphor has a D50 particle size from about 0.5 microns to about 15 microns, where A is Li, Na, K, Rb, Cs, or a combination thereof; M is Si, Ge, Sn, Ti, Zr, Al, Ga, In, Sc, Y, La, Nb, Ta, Bi, Gd, or a combination thereof; x is the absolute value of the charge of the [MFy] ion; and y is 5, 6 or 7.Type: ApplicationFiled: November 6, 2023Publication date: April 11, 2024Inventors: Aharon Yakimov, Gurvinder Singh Khinda, James E. Murphy, Felippe Pavinatto, Daniel Peter DePuccio, Kathleen Ann Maleski-Yadeski, Jie Jerry Liu, Zeying Chen
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Patent number: 11868244Abstract: A compressed memory system of a processor-based system includes a memory partitioning circuit for partitioning a memory region into data regions with different priority levels. The system also includes a cache line selection circuit for selecting a first cache line from a high priority data region and a second cache line from a low priority data region. The system also includes a compression circuit for compressing the cache lines to obtain a first and a second compressed cache line. The system also includes a cache line packing circuit for packing the compressed cache lines such that the first compressed cache line is written to a first predetermined portion and the second cache line or a portion of the second compressed cache line is written to a second predetermined portion of the candidate compressed cache line. The first predetermined portion is larger than the second predetermined portion.Type: GrantFiled: January 10, 2022Date of Patent: January 9, 2024Assignee: QUALCOMM IncorporatedInventors: Norris Geng, Richard Senior, Gurvinder Singh Chhabra, Kan Wang
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Publication number: 20240000492Abstract: Treatment systems, methods, and apparatuses for treating acne, hyperhidrosis, and other skin conditions are described. Aspects of the technology can include cooling a surface of a patient's skin and detecting changes in the tissue. The tissue can be cooled a sufficient length of time and to a temperature low enough to affect glands or other targeted structures in the skin.Type: ApplicationFiled: May 4, 2023Publication date: January 4, 2024Inventors: Leonard DeBenedictis, George Frangineas, JR., Kristine Tatsutani, Bryan J. Weber, Kerrie Jiang, Peter Yee, Linda Pham, Gurvinder Singh Nanda
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Patent number: 11829292Abstract: A compressed memory system includes a memory region that includes cache lines having priority levels. The compressed memory system also includes a compressed memory region that includes compressed cache lines. Each compressed cache line includes a first set of data bits configured to hold, in a first direction, either a portion of a first cache line or a portion of the first cache line after compression, the first cache line having a first priority level. Each compressed cache line also includes a second set of data bits configured to hold, in a second direction opposite to the first direction, either a portion of a second cache line or a portion of the second cache line after compression, the second cache line having a priority level lower than the first priority level. The first set of data bits includes a greater number of bits than the second set of data bits.Type: GrantFiled: January 10, 2022Date of Patent: November 28, 2023Assignee: QUALCOMM IncorporatedInventors: Norris Geng, Richard Senior, Gurvinder Singh Chhabra, Kan Wang
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Patent number: 11782762Abstract: A method of managing a stack includes detecting, by a stack manager of a processor, that a size of a frame to be allocated exceeds available space of a first stack. The first stack is used by a particular task executing at the processor. The method also includes designating a second stack for use by the particular task. The method further includes copying metadata associated with the first stack to the second stack. The metadata enables the stack manager to transition from the second stack to the first stack upon detection that the second stack is no longer in use by the particular task. The method also includes allocating the frame in the second stack.Type: GrantFiled: February 26, 2020Date of Patent: October 10, 2023Assignee: QUALCOMM IncorporatedInventors: Richard Senior, Sundeep Kushwaha, Harsha Gordhan Jagasia, Christopher Ahn, Gurvinder Singh Chhabra, Nieyan Geng, Maksim Krasnyanskiy, Unni Prasad
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Patent number: 11722802Abstract: An image sensor may include an array of image pixels. The array of image pixel may be coupled to column readout circuitry. A given image pixel may generate a low light signal and a high light signal for a given exposure. A column line may couple the given image pixel to readout circuitry having amplifier circuitry. The column line may be coupled to an autozeroing transistor for reading out the high light signal and a source follower stage for readout out the low light signal. The amplifier circuitry may receive different common mode voltage depending on whether it is amplifying the low or high light signal. The gain and other operating parameters of the amplifier circuitry may be adjusted based on whether it is amplifying the low or high signal. If desired, separate amplifier circuitry may be implemented for the low and high light signals.Type: GrantFiled: August 9, 2022Date of Patent: August 8, 2023Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Rajashekar Benjaram, Gurvinder Singh
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Publication number: 20230239685Abstract: Disclosed herein is a method and system for utilizing a digital data capture device in conjunction with a Bluetooth (BT) enabled mobile device for publishing data and multimedia content on one or more websites automatically or with minimal user intervention. A client application is provided on the BT enabled mobile device. In the absence of inbuilt BT capability, a BT communication device is provided on the digital data capture device. The BT communication device is paired with the BT enabled mobile device to establish a connection. The client application detects capture of data and multimedia content on the digital data capture device and initiates transfer of the captured data, multimedia content, and associated files. The digital data capture device transfers the captured data, multimedia content, and the associated files to the client application. The client application automatically publishes the transferred data and multimedia content on one or more websites.Type: ApplicationFiled: March 31, 2023Publication date: July 27, 2023Inventors: Gurvinder Singh, Marcos Klein, Vince Laviano
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Publication number: 20230236979Abstract: A compressed memory system includes a memory region that includes cache lines having priority levels. The compressed memory system also includes a compressed memory region that includes compressed cache lines. Each compressed cache line includes a first set of data bits configured to hold, in a first direction, either a portion of a first cache line or a portion of the first cache line after compression, the first cache line having a first priority level. Each compressed cache line also includes a second set of data bits configured to hold, in a second direction opposite to the first direction, either a portion of a second cache line or a portion of the second cache line after compression, the second cache line having a priority level lower than the first priority level. The first set of data bits includes a greater number of bits than the second set of data bits.Type: ApplicationFiled: January 10, 2022Publication date: July 27, 2023Inventors: Norris GENG, Richard SENIOR, Gurvinder Singh CHHABRA, Kan WANG
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Publication number: 20230236961Abstract: A compressed memory system of a processor-based system includes a memory partitioning circuit for partitioning a memory region into data regions with different priority levels. The system also includes a cache line selection circuit for selecting a first cache line from a high priority data region and a second cache line from a low priority data region. The system also includes a compression circuit for compressing the cache lines to obtain a first and a second compressed cache line. The system also includes a cache line packing circuit for packing the compressed cache lines such that the first compressed cache line is written to a first predetermined portion and the second cache line or a portion of the second compressed cache line is written to a second predetermined portion of the candidate compressed cache line. The first predetermined portion is larger than the second predetermined portion.Type: ApplicationFiled: January 10, 2022Publication date: July 27, 2023Inventors: Norris GENG, Richard SENIOR, Gurvinder Singh CHHABRA, Kan WANG
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Patent number: 11687461Abstract: A compressed memory system includes a memory region that includes cache lines having priority levels. The compressed memory system also includes a compressed memory region that includes compressed cache lines. Each compressed cache line includes a first set of data bits configured to hold, in a first direction, either a portion of a first cache line or a portion of the first cache line after compression, the first cache line having a first priority level. Each compressed cache line also includes a second set of data bits configured to hold, in a second direction opposite to the first direction, either a portion of a second cache line or a portion of the second cache line after compression, the second cache line having a priority level lower than the first priority level. The first set of data bits includes a greater number of bits than the second set of data bits.Type: GrantFiled: January 10, 2022Date of Patent: June 27, 2023Assignee: QUALCOMM IncorporatedInventors: Norris Geng, Richard Senior, Gurvinder Singh Chhabra, Kan Wang
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Patent number: 11659381Abstract: Disclosed herein is a method and system for utilizing a digital data capture device in conjunction with a Bluetooth (BT) enabled mobile device for publishing data and multimedia content on one or more websites automatically or with minimal user intervention. A client application is provided on the BT enabled mobile device. In the absence of inbuilt BT capability, a BT communication device is provided on the digital data capture device. The BT communication device is paired with the BT enabled mobile device to establish a connection. The client application detects capture of data and multimedia content on the digital data capture device and initiates transfer of the captured data, multimedia content, and associated files. The digital data capture device transfers the captured data, multimedia content, and the associated files to the client application. The client application automatically publishes the transferred data and multimedia content on one or more websites.Type: GrantFiled: December 4, 2021Date of Patent: May 23, 2023Inventors: Gurvinder Singh, Marcos Klein, Vince Laviano
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Publication number: 20220385847Abstract: An image sensor may include an array of image pixels. The array of image pixel may be coupled to column readout circuitry. A given image pixel may generate a low light signal and a high light signal for a given exposure. A column line may couple the given image pixel to readout circuitry having amplifier circuitry. The column line may be coupled to an autozeroing transistor for reading out the high light signal and a source follower stage for readout out the low light signal. The amplifier circuitry may receive different common mode voltage depending on whether it is amplifying the low or high light signal. The gain and other operating parameters of the amplifier circuitry may be adjusted based on whether it is amplifying the low or high signal. If desired, separate amplifier circuitry may be implemented for the low and high light signals.Type: ApplicationFiled: August 9, 2022Publication date: December 1, 2022Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Rajashekar BENJARAM, Gurvinder SINGH
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Patent number: 11443011Abstract: A system may include an application server and a user device. The application server may host an application customized for the user device. Tests may be designed to check the functionality of the application at the user device. The application and test may be designed using a page objects library which improve durability of the application and tests to changes made to the application. Thus, even if changes are made to the application, the test which check the functionality of the application may not break if the application and the tests are created based on the page objects library. The application sever may generate the page objects library and distribute the page objects library to its tenants.Type: GrantFiled: December 13, 2018Date of Patent: September 13, 2022Assignee: Salesforce, Inc.Inventors: Elizaveta Ivanova, Manpreet Saini, Tanay Ponkshe, Gurvinder Singh
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Patent number: 11445140Abstract: An image sensor may include an array of image pixels. The array of image pixel may be coupled to column readout circuitry. A given image pixel may generate a low light signal and a high light signal for a given exposure. A column line may couple the given image pixel to readout circuitry having amplifier circuitry. The column line may be coupled to an autozeroing transistor for reading out the high light signal and a source follower stage for readout out the low light signal. The amplifier circuitry may receive different common mode voltage depending on whether it is amplifying the low or high light signal. The gain and other operating parameters of the amplifier circuitry may be adjusted based on whether it is amplifying the low or high signal. If desired, separate amplifier circuitry may be implemented for the low and high light signals.Type: GrantFiled: August 10, 2020Date of Patent: September 13, 2022Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Rajashekar Benjaram, Gurvinder Singh