Patents by Inventor Gustav E. Derkits

Gustav E. Derkits has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040217475
    Abstract: A novel contact structure and method for a multilayer gettering contact metallization is provided utilizing a thin layer of a pure metal as the initial layer formed on a semiconductor cap layer. During formation of the contact structure, this thin metal layer reacts with the cap layer and the resulting reacted layer traps mobile impurities and self-interstitials diffusing within the cap layer and in nearby metal layers, preventing further migration into active areas of the semiconductor device. The contact metallization is formed of pure metal layers compatible with each other and with the underlying semiconductor cap layer such that depth of reaction is minimized and controllable by the thickness of the metal layers applied. Thin semiconductor cap layers, such as InGaAs cap layers less than 200 nm thick, may be used in the present invention with extremely thin pure metal layers of thickness 10 nm or less, thus enabling an increased level of integration for semiconductor optoelectronic devices.
    Type: Application
    Filed: May 27, 2004
    Publication date: November 4, 2004
    Inventors: Gustav E. Derkits, William R. Heffner, Padman Parayanthal, Patrick J. Carroll, Ranjani C. Muthiah
  • Publication number: 20030141599
    Abstract: A novel contact structure and method for a multilayer gettering contact metallization is provided utilizing a thin layer of a pure metal as the initial layer formed on a semiconductor cap layer. During formation of the contact structure, this thin metal layer reacts with the cap layer and the resulting reacted layer traps mobile impurities and self-interstitials diffusing within the cap layer and in nearby metal layers, preventing further migration into active areas of the semiconductor device. The contact metallization is formed of pure metal layers compatible with each other and with the underlying semiconductor cap layer such that depth of reaction is minimized and controllable by the thickness of the metal layers applied. Thin semiconductor cap layers, such as InGaAs cap layers less than 200 nm thick, may be used in the present invention with extremely thin pure metal layers of thickness 10 nm or less, thus enabling an increased level of integration for semiconductor optoelectronic devices.
    Type: Application
    Filed: February 4, 2003
    Publication date: July 31, 2003
    Inventors: Gustav E. Derkits, William R. Heffner, Padman Parayanthal, Patrick J. Carroll, Ranjani C. Muthiah
  • Patent number: 6590913
    Abstract: A barrier layer is formed within a microfabricated device, such as a semiconductor laser assembly. The barrier layer is used to separate bonding material from an underlying layer that is located beneath the barrier layer. The barrier layer includes at least three thin layers that have alternating levels of electronegativity. Therefore, a significant amount of intermetallics are formed between the thin layers, thereby creating strong bonds between the thin layers at relatively low temperatures. It is difficult for the bonding material to break the strong bonds of the thin layers, and the bonding material is, therefore, prevented from penetrating the barrier layer and reacting with the underlying layer.
    Type: Grant
    Filed: May 14, 1999
    Date of Patent: July 8, 2003
    Assignee: TriQuint Technology Holding Co.
    Inventors: Bernard Caras, David G. Coult, Gustav E. Derkits, Charles Lentz, Debra L. Waltemyer
  • Patent number: 6520348
    Abstract: An apparatus and method for diffusion annealing impurities onto a plurality of wafers is described. A hollow wafer holder includes a plurality of first and second slots. The first slots are sized and shaped to receive a pair of wafers. The first slots are angled relative to a longitudinal axis of the wafer holder. The wafer holder is positioned at a first location within an ampoule, with a diffusion source being positioned at a second location within the ampoule. The ampoule is sealed and placed within or near a heat source. The heat source alters the physical state of the diffusion source to allow the entrained impurities to diffuse throughout the ampoule. The inclination of the first slots allows a sufficient clearance between the wafers and the ampoule to allow impurities within a gaseous diffusion source to extend throughout the ampoule. The presence of the second slots allows a more uniform diffusion of the impurities to the wafers.
    Type: Grant
    Filed: April 4, 2000
    Date of Patent: February 18, 2003
    Assignee: Lucent Technologies Inc.
    Inventors: Dutt V. Bulusu, Robert L. Mcanally, Michael Geva, Gustav E. Derkits, Robert A. Resta
  • Publication number: 20020076187
    Abstract: The present invention provides an optoelectronic device and a method of manufacture therefor. The optoelectronic device includes an optical active layer formed over a substrate and an active region formed in the optical active layer. The optoelectronic device further includes a P-contact and an N-contact formed over a same side of the substrate and associated with the active region.
    Type: Application
    Filed: August 21, 2001
    Publication date: June 20, 2002
    Applicant: Agere Systems Optoelectronics Guardian Corp.
    Inventors: David G. Coult, Gustav E. Derkits, Charles W. Lentz, Bryan P. Segner