Patents by Inventor Guy C. Cerulli

Guy C. Cerulli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5438606
    Abstract: An open power loop detector for digital transmission line elements using a pulsed, direct current test. The element detects when a fault in transmission lines has been corrected and the element should move from a loop powered mode back to a normal through powered mode. The detector includes a voltage regulator, voltage booster, current detector, and controller. The controller periodically activates the voltage booster to increase the direct current load between the transmit and receive cable pairs of the transmission lines. The current detector then senses whether a current is flowing between the center tap leads of the transmit cable pair. If no current is detected, indicating that the downstream transmission line still has a discontinuity, the controller waits a predetermined period of time before again activating the voltage booster and performing another test.
    Type: Grant
    Filed: April 30, 1993
    Date of Patent: August 1, 1995
    Assignee: Teltrend Inc.
    Inventor: Guy C. Cerulli
  • Patent number: 5437023
    Abstract: An improved address acknowledgement system for line elements such as repeaters in a digital telecommunication network. The system is preferably controlled by logic circuitry, in conjunction with a microprocessor. A remote facility such as a test unit transmits to the repeater a loopup command, requesting the repeater to enter loopback mode. The repeater acknowledges receipt of this command by inverting its address and transmitting the inverted address back to the test set. The test set either scans its incoming data stream for the inverted address of the line element or inverts the incoming data stream and scans the inverted incoming data stream for the non-inverted address of the line element. In either case, another line element bearing the same non-inverted address as the line element targeted to enter loopback will not interpret the inverted address as a loopup command. Accordingly, other line elements will not thereby be unintentionally caused to enter loopback mode.
    Type: Grant
    Filed: February 9, 1994
    Date of Patent: July 25, 1995
    Assignee: Teltrend, Inc.
    Inventors: Laurence L. Sheets, Guy C. Cerulli