Patents by Inventor Guy Feuillet

Guy Feuillet has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200203556
    Abstract: The invention relates to a method of manufacturing at least one optoelectronic structure on a support substrate. In particular, this invention relates to manufacturing of an optoelectronic structure that has a plurality of coplanar light emitting diodes, and formed from a succession of light emitting stacks. Therefore this invention uses a cavity, the bottom of which has a staged profile, such that the formation of the succession of light emitting stacks reproduces the staged profile of the bottom of the cavity, on its exposed face. Performance of a step to level the succession of light emitting stacks relative to a reference level defined by the exposed surface portion vertically in line with the deepest step, then makes it possible to reveal a set of coplanar light emitting diodes.
    Type: Application
    Filed: December 16, 2019
    Publication date: June 25, 2020
    Applicants: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE
    Inventors: Guy FEUILLET, Benjamin DAMILANO, Jean-Yves DUBOZ, Christophe LARGERON
  • Patent number: 10615299
    Abstract: An optoelectronic device including three-dimensional semiconductor elements predominantly made of a first compound selected from among the group consisting of Compounds III-V, Compounds II-VI, and Compounds IV. Each semiconductor element defines, optionally with insulating portions partially covering said semiconductor element, at least one first surface including contiguous facets angled relative to each other. The optoelectronic device includes quantum dots at least some of the seams between the facets. The quantum dots are predominantly made of a mixture of the first compound and an additional element and are suitable for emitting or receiving a first electromagnetic radiation at a first wavelength.
    Type: Grant
    Filed: September 29, 2015
    Date of Patent: April 7, 2020
    Assignees: Commissariat à l'Énergie Atomique et aux Énergies Alternatives, Aledia
    Inventors: Ivan-Christophe Robin, Amélie Dussaigne, Guy Feuillet, Stéphanie Gaugiran
  • Patent number: 10553426
    Abstract: A process allowing at least one semipolar layer of nitride to be obtained, which layer is obtained from a least one among gallium, indium and aluminum on a top surface of a single-crystal layer based on silicon, wherein the process comprises the following steps: etching, from the top surface of the single-crystal layer, a plurality of parallel grooves comprising at least two opposite inclined facets, at least one of two opposite facets having a crystal orientation; masking the top surface of the single-crystal layer such that the facets having a crystal orientation are not masked; and epitaxial growth of the semipolar layer of nitride from the not masked facets; wherein the etching is carried out on a stack comprising the single-crystal layer and at least one stop layer that is surmounted by the single-crystal layer and wherein the etching etches the single-crystal layer selectively with respect to the stop layer so that the etching stops on contact with the stop layer.
    Type: Grant
    Filed: November 30, 2016
    Date of Patent: February 4, 2020
    Assignees: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE
    Inventors: Guy Feuillet, Michel El Khoury Maroun, Philippe Vennegues, Jesus Zuniga Perez
  • Publication number: 20190081204
    Abstract: A subject matter of the invention relates to a method for obtaining at least one semi-polar layer (480) of nitride (N) on an upper surface of a crystalline layer (300), the method comprising the steps of: etching parallel grooves (320) starting from the upper surface of the crystalline substrate (300), each groove (320) comprising at least one facet (310) having a crystalline orientation {111}; forming a mask (331) such that the facets (311) opposite to said facets (310) having a crystalline orientation {111} are masked and that said facets (310) having a crystalline orientation {111} are not masked; at least one first epitaxial growth phase, carried out from said non-masked facets (310) in such a way as to form a seed (440); interruption of the first epitaxial growth phase when said seed (440) has an inclined facet (442) having a crystalline orientation (0001) and an upper facet (441) having a crystalline orientation (1011); a surface treatment step comprising a modification of an upper portion of the see
    Type: Application
    Filed: February 21, 2017
    Publication date: March 14, 2019
    Applicants: COMMISSARIA A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE
    Inventors: Guy FEUILLET, Michel EL KHOURY MAROUN, Philippe VENNEGUES, Jesus ZUNIGA PEREZ
  • Publication number: 20180330941
    Abstract: A process allowing at least one semipolar layer of nitride to be obtained, which layer is obtained from a least one among gallium, indium and aluminum on a top surface of a single-crystal layer based on silicon, wherein the process comprises the following steps: etching, from the top surface of the single-crystal layer, a plurality of parallel grooves comprising at least two opposite inclined facets, at least one of two opposite facets having a crystal orientation; masking the top surface of the single-crystal layer such that the facets having a crystal orientation are not masked; and epitaxial growth of the semipolar layer of nitride from the not masked facets; wherein the etching is carried out on a stack comprising the single-crystal layer and at least one stop layer that is surmounted by the single-crystal layer and wherein the etching etches the single-crystal layer selectively with respect to the stop layer so that the etching stops on contact with the stop layer.
    Type: Application
    Filed: November 30, 2016
    Publication date: November 15, 2018
    Inventors: Guy FEUILLET, Michel EL KHOURY MAROUN, Philippe VENNEGUES, Jesus ZUNIGA PEREZ
  • Publication number: 20180233610
    Abstract: An optoelectronic device including three-dimensional semiconductor elements predominantly made of a first compound selected from among the group consisting of Compounds III-V, Compounds II-VI, and Compounds IV. Each semiconductor element defines, optionally with insulating portions partially covering said semiconductor element, at least one first surface including contiguous facets angled relative to each other. The optoelectronic device includes quantum dots at least some of the seams between the facets. The quantum dots are predominantly made of a mixture of the first compound and an additional element and are suitable for emitting or receiving a first electromagnetic radiation at a first wavelength.
    Type: Application
    Filed: September 29, 2015
    Publication date: August 16, 2018
    Inventors: Ivan-Christophe Robin, Amélie Dussaigne, Guy Feuillet, Stéphanie Gaugiran
  • Publication number: 20180182622
    Abstract: A method making it possible to obtain, on an upper surface of a crystalline substrate, a semipolar layer of nitride material comprising any one from among gallium, aluminium or indium, the method comprises the following steps: obtaining, on the upper surface of the crystalline substrate, a plurality of parallel grooves which extend in a first direction, one of the two opposite facets exhibiting a crystal orientation; etching a plurality of parallel slices which extend in a second direction that has undergone a rotation with respect to the first direction of the grooves in such a way as to obtain individual facets exhibiting a crystal orientation; epitaxial growth of the material from the individual facets.
    Type: Application
    Filed: June 16, 2016
    Publication date: June 28, 2018
    Inventors: Michel EL KHOURY MAROUN, Guy FEUILLET, Philippe VENNEGUES, Jesus ZUNIGA PEREZ
  • Patent number: 8852997
    Abstract: A method for purifying an n-type ZnO and/or ZnMgO substrate to reduce or eliminate the residual extrinsic impurities including introducing a reactive species having strong chemical affinity for at least one of the residual extrinsic impurities, and/or being capable of creating crystalline defects, is introduced in at least one region of the substrate, the reactive species being P, and whereby at least one getter region capable of trapping the said residual extrinsic impurities and/or in which the residual extrinsic impurities are trapped is created in the substrate; then annealing the substrate to cause diffusion of the residual extrinsic impurities towards the getter region and/or to outside the getter region. A method for preparing a p-doped ZnO and/or ZnMgO substrate comprising purifying an n-type ZnO and/or ZnMgO substrate using the above purification method in which one or more reactive species are used not limited to phosphorus alone.
    Type: Grant
    Filed: June 1, 2011
    Date of Patent: October 7, 2014
    Assignee: Commissariat à l'énergie atomique et aux énergies alternatives
    Inventors: Isabelle Bisotto, Guy Feuillet
  • Publication number: 20130137214
    Abstract: A method for purifying an n-type ZnO and/or ZnMgO substrate to reduce or eliminate the residual extrinsic impurities of the substrate with a view to p-doping of at least are part of the substrate, wherein a reactive species having strong chemical affinity for at least one of the residual extrinsic impurities, and/or being capable of creating crystalline defects, is introduced in at least one region of the substrate, the said reactive species being P, and whereby at least one region called a getter region capable of trapping the said residual extrinsic impurities and/or in which the residual extrinsic impurities are trapped is created in the substrate; annealing of the substrate is then carried out to cause diffusion of the residual extrinsic impurities towards the getter region and/or to outside the getter region, preferably towards at least one surface of the substrate.
    Type: Application
    Filed: June 1, 2011
    Publication date: May 30, 2013
    Applicant: Commissariat a l'energie atomique et aux energies alternatives
    Inventors: Isabelle Bisotto, Guy Feuillet
  • Patent number: 7906362
    Abstract: An assembly method to enable local electrical bonds between zones located on a face of a first substrate and corresponding zones located on a face of a second substrate, the faces being located facing each other, at least one of the substrates having a surface topography. The method forms an intermediate layer including at least one burial layer on the face of the substrate or substrates having a surface topography to make it (them) compatible with molecular bonding of the faces of substrates to each other from a topographic point of view, resistivity and/or thickness of the intermediate layer being chosen to enable the local electrical bonds, brings the two faces into contact, the substrates positioned to create electrical bonds between areas on the first substrate and corresponding areas on the second substrate, and bonds the faces by molecular bonding.
    Type: Grant
    Filed: June 29, 2005
    Date of Patent: March 15, 2011
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Guy Feuillet, Hubert Moriceau, Stephane Pocas, Eric Jalaguier, Norbert Moussy
  • Publication number: 20090311528
    Abstract: Method for passivating non-radiatives recombination centres of a ZnO specimen in which magnesium is deposited on at least one surface of the ZnO specimen, and annealing of the specimen on which magnesium is deposited is performed in an oxidizing atmosphere. ZnO specimen thus obtained.
    Type: Application
    Filed: June 8, 2009
    Publication date: December 17, 2009
    Inventors: Ivan-Christophe Robin, Guy Feuillet
  • Publication number: 20080296712
    Abstract: The invention relates to an assembly method to enable local electrical bonds between zones located on a face of a first substrate and corresponding zones located on a face of a second substrate, said faces being located facing each other, at least one of the substrates having a surface topography, characterised in that the method comprises steps consisting of: forming an intermediate layer comprising at least one burial layer on the face of the substrate or substrates having a surface topography to make it (them) compatible with molecular bonding of said faces of substrates to each other from a topographic point of view, the resistivity and/or thickness of the intermediate layer being chosen to enable said local electrical bonds, bringing the two faces into contact, the substrates being positioned so as to create electrical bonds between areas located on the first substrate and the corresponding areas located on the second substrate, bonding the faces of the first and second substrates by molecular bonding
    Type: Application
    Filed: June 29, 2005
    Publication date: December 4, 2008
    Applicant: Commissariat A L'Energie Atomique
    Inventors: Guy Feuillet, Hubert Moriceau, Stephane Pocas, Eric Jalaguier, Moussy Norbert
  • Publication number: 20080041517
    Abstract: A process assembling first and second substrates on contact faces by molecular bonding. The first substrate contact face has an electrically conducting layer on at least part of its surface. The process deposits a bond layer on at least part of the electrically conducting layer, which bond layer can molecularly bond with a zone of the second substrate contact face and be combined with the electrically conducting layer to form a conducting alloy, contacts the bond layer with the zone of the second substrate contact face and molecularly bond them, and transforms over all or part of its thickness of all or part of the electrically conducting layer with all or part of the bond layer and with at least part of the thickness of the zone of the contact face on all or part of the surface of the second substrate to form a conducting alloy(s) zone.
    Type: Application
    Filed: June 29, 2005
    Publication date: February 21, 2008
    Applicant: Commissariat A L'Energie Atomique
    Inventors: Hubert Moriceau, Guy Feuillet, Stephane Pocas
  • Patent number: 5349596
    Abstract: A semiconductor heterostructure laser cavity is disclosed which has semiconductor layers epitaxied to define four zones on a substrate. The laser cavity includes a first zone with a composition that varies continuously from a first face to a second face with a gap decreasing from the first face to the second face, the first zone ensuring an optical confinement and light guidance. A second zone constitutes an active emission zone in contact with the second face of the first zone and having at least one quantum well with a gap smaller than that of the first zone. A third zone has a gap larger than that of the at least one quantum well. The third zone ensuring an optical confinement and a light guidance, and having a composition which varies continuously from a first face to a second face with a gap which increases from the first face to the second face, the first face of the third zone being in contact with the active emission zone.
    Type: Grant
    Filed: April 16, 1993
    Date of Patent: September 20, 1994
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Engin Molva, Roger Accomo, Guy Feuillet, Joel Cibert, Dang Le Si, Claire Bodin-Deshayes