Abstract: A method is provided and includes: receiving at a processor of a user device a search query for an application; and obtaining search results based on the search query. Each of the search results includes: access information including a reference to an application executable on the processor and indicating an operation for the application to enter an operating state, where the application provides content related to the search query while in the operating state; a category; and a tag indicating a function of the application. The method further includes: displaying a search result objects; displaying a category or a tag for each category or tag represented in the search results; receiving an input indicating one of the categories or tags, which has been selected; and based on the selected category or tag, displaying a subset of the search results corresponding to the one of the categories or tags.

Abstract: Systems, methods, and devices that employ moving program verify levels to facilitate programming data to memory elements in a memory component are presented. A program component can employs a specified number of program verify (PV) levels where a first program pulse is applied to a selected group of memory elements to facilitate verifying the cells to pass the first PV level. The PV level can be moved to a next PV level that is a higher charge level than or equal to the first PV level, and a subset of the group of cells that are below the next PV level are selected and a next program pulse is applied to the subset of cells to facilitate verifying the cells to pass the next PV level. The moving PV level process can continue until the group of memory elements is verified to pass the target PV level.

Abstract: Systems, methods, and devices that facilitate multi-phase programming of data in a memory component are presented. Received data is programmed to a memory using multiple programming phases based on a predefined program pattern. A program learn is performed by varying drain voltages, as desired, to facilitate determining respective drain voltages related to specified subgroups associated with respective data levels for a first programming phase. A first programming phase is performed using learned drain voltages as initial drain voltages where drain voltage levels are varied during each program pulse to facilitate programming memory cells to respective intrinsic verify voltage levels based on respective data levels.

Abstract: Systems, methods, and devices that employ moving program verify levels to facilitate programming data to memory elements in a memory component are presented. A program component can employs a specified number of program verify (PV) levels where a first program pulse is applied to a selected group of memory elements to facilitate verifying the cells to pass the first PV level. The PV level can be moved to a next PV level that is a higher charge level than or equal to the first PV level, and a subset of the group of cells that are below the next PV level are selected and a next program pulse is applied to the subset of cells to facilitate verifying the cells to pass the next PV level. The moving PV level process can continue until the group of memory elements is verified to pass the target PV level.

Abstract: Systems, methods, and devices that facilitate multi-phase programming of data in a memory component are presented. Received data is programmed to a memory using multiple programming phases based on a predefined program pattern. A program learn is performed by varying drain voltages, as desired, to facilitate determining respective drain voltages related to specified subgroups associated with respective data levels for a first programming phase. A first programming phase is performed using learned drain voltages as initial drain voltages where drain voltage levels are varied during each program pulse to facilitate programming memory cells to respective intrinsic verify voltage levels based on respective data levels.