Patents by Inventor Guy Imbert

Guy Imbert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8441765
    Abstract: An electrostatic discharge (ESD) protected device includes a device (6) to be protected and an ESD protection circuit (4). It is determined that if an ESD pulse is applied to pad (2) a leakage current flows on path (14) through the device (6). This leakage current of the device to be protected (6) is used as a precursor trigger signal to trigger the ESD device (4).
    Type: Grant
    Filed: December 8, 2005
    Date of Patent: May 14, 2013
    Assignee: NXP B.V.
    Inventors: Frederic F. Barbier, Fabrice Blanc, Guy Imbert, Denis Raoulx
  • Publication number: 20090303644
    Abstract: An electrostatic discharge (ESD) protected device includes a device (6) to be protected and an ESD protection circuit (4). It is determined that if an ESD pulse is applied to pad (2) a leakage current flows on path (14) through the device (6). This leakage current of the device to be protected (6) is used as a precursor trigger signal to trigger the ESD device (4).
    Type: Application
    Filed: December 8, 2005
    Publication date: December 10, 2009
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventors: Frederic F. Barbier, Fabrice Blanc, Guy Imbert, Denis Raoulx
  • Publication number: 20020132387
    Abstract: Process for fabricating electronic components, of the variable capacitor or microswitch type, comprising a fixed plate (1) and a deformable membrane (20) which are located opposite each other, which comprises the following steps, consisting in:
    Type: Application
    Filed: May 20, 2002
    Publication date: September 19, 2002
    Applicant: Memscap
    Inventors: Catherine Charrier, Eric Bouchon, Alain Campo, Guy Imbert, Francois Valentin, Laurent Basteres
  • Patent number: 6444488
    Abstract: Process for fabricating electronic components, of the variable capacitor or microswitch type, comprising a fixed plate (1) and a deformable membrane (20) which are located opposite each other, which comprises the following steps, consisting in: depositing a first metal layer on an oxide layer (2), said first metal layer being intended to form the fixed plate; depositing a metal ribbon (10, 11) on at least part of the periphery and on each side of the fixed plate (1), said ribbon being intended to serve as a spacer between the fixed plate (1) and the deformable membrane (20); depositing a sacrificial resin layer (15) over at least the area of said fixed plate (1); generating, by lithography, a plurality of wells in the surface of said sacrificial resin layer; depositing, by electrolysis, inside the wells formed in the sacrificial resin (15), at least one metal region intended to form the deformable membrane (20), this metal region extending between sections of the metal ribbon (10, 11) which are located o
    Type: Grant
    Filed: May 15, 2001
    Date of Patent: September 3, 2002
    Assignee: Memscap and Planheas-Silmag PHS
    Inventors: Catherine Charrier, Eric Bouchon, Alain Campo, Guy Imbert, François Valentin, Laurent Basteres
  • Patent number: 6429764
    Abstract: Apparatus and Method relating to a microcomponent such as an inductor in which copper segments are mounted in parallel channels of a non-conductive substrate so that the top surfaces of the segments are coplanar with the top surface of the substrate. A core material is placed over the top surface of the substrate and conductive arches are arranged to connect one end of each segment with the opposite end of an adjacent segment to form a coil that encircles the core.
    Type: Grant
    Filed: April 26, 2000
    Date of Patent: August 6, 2002
    Assignee: Memscap & Planhead-Silmag PHS
    Inventors: Jean-Michel Karam, Laurent Basteres, Ahmed Mhani, Catherine Charrier, Eric Bouchon, Guy Imbert, Patrick Martin, François Valentin
  • Publication number: 20010040250
    Abstract: Process for fabricating electronic components, of the variable capacitor or microswitch type, comprising a fixed plate (1) and a deformable membrane (20) which are located opposite each other, which comprises the following steps, consisting in:
    Type: Application
    Filed: May 15, 2001
    Publication date: November 15, 2001
    Applicant: Memscap
    Inventors: Catherine Charrier, Eric Bouchon, Alain Campo, Guy Imbert, Francois Valentin, Laurent Basteres
  • Patent number: 5278795
    Abstract: The invention relates to a memory having a line decoder provided with a Darlington-type switching stage. When the deselection time T.sub.1 of a line is notably shorter than the intrinsic switching time T.sub.3 of a memory cell (M11 . . . Mnp), a discharge current I.sub.D is temporarily applied to the lower line conductor (1' . . . n') of the line (L1 . . . Ln) which is deselected. To achieve this, the current source I.sub.D is connected to said lower line conductors (1' . . . n') via delay circuits (RL1, DL1 . . . RLn, DLn) having a time constant T.sub.2 which is smaller than T.sub.3 and at least equal to T.sub.1.
    Type: Grant
    Filed: August 16, 1990
    Date of Patent: January 11, 1994
    Assignee: U.S. Philips Corporation
    Inventors: Stephane Barbu, Guy Imbert
  • Patent number: 4706222
    Abstract: A switching stage receives two levels at its input, i.e. a high selection level and a low non-selection level. The Darlington stage (T.sub.1, T.sub.2) supplies at its output (E) a high current in the selected mode and a considerably smaller current in the non-selected mode. In order to accelerate the evacuation of charges accumulated in the base of T.sub.2 and hence the deselection time of the stage, an auxiliary current source (I), is connected to a point A. Between the base (B) of the transistor T.sub.2 and the point A two diodes (D.sub.1, D.sub.2) are connected in series in the forward direction. Between the emitter (E) of T.sub.2 and the point A a diode (D.sub.3) is connected in the forward direction. In the selected mode, the major part of the current I passes through D.sub.1, D.sub.2 and this current permits the evacuation of the charges from the base of the transistor T.sub.2 when the stage is deselected.
    Type: Grant
    Filed: April 15, 1986
    Date of Patent: November 10, 1987
    Assignee: U.S. Philips Corporation
    Inventors: Jean-Claude Kwiatkowski, Guy Imbert