Patents by Inventor Guy Maor
Guy Maor has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11586684Abstract: When a client device loads a resource, a request for a first content item for a first content item slot is transmitted to a content item selection system. The content item selection system uses a predictive model to determine a predicted content item slot based on a document object model position of the first content item slot and a URL of the resource or a publisher identifier. Parameters for the predicted content item slot are used to select a subsequent content item for the predicted content item slot. The first content item and the subsequent content item are transmitted to the client device responsive to the request. The subsequent content item includes metadata indicative of the parameters of the predicted content item slot to be matched to a subsequent content item slot of the resource.Type: GrantFiled: September 10, 2019Date of Patent: February 21, 2023Assignee: GOOGLE LLCInventors: Matthew Strecker Burriesci, David Kent German, Mathieu Gagne, Michael Kleber, Jonathan Frank Guarino, Guy Maor
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Publication number: 20200004793Abstract: When a client device loads a resource, a request for a first content item for a first content item slot is transmitted to a content item selection system. The content item selection system uses a predictive model to determine a predicted content item slot based on a document object model position of the first content item slot and a URL of the resource or a publisher identifier. Parameters for the predicted content item slot are used to select a subsequent content item for the predicted content item slot. The first content item and the subsequent content item are transmitted to the client device responsive to the request. The subsequent content item includes metadata indicative of the parameters of the predicted content item slot to be matched to a subsequent content item slot of the resource.Type: ApplicationFiled: September 10, 2019Publication date: January 2, 2020Applicant: Google LLCInventors: Matthew Strecker Burriesci, David Kent German, Mathieu Gagne, Michael Kleber, Jonathan Frank Guarino, Guy Maor
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Patent number: 10423674Abstract: When a client device loads a resource, a request for a first content item for a first content item slot is transmitted to a content item selection system. The content item selection system uses a predictive model to determine a predicted content item slot based on a document object model position of the first content item slot and a URL of the resource or a publisher identifier. Parameters for the predicted content item slot are used to select a subsequent content item for the predicted content item slot. The first content item and the subsequent content item are transmitted to the client device responsive to the request. The subsequent content item includes metadata indicative of the parameters of the predicted content item slot to be matched to a subsequent content item slot of the resource.Type: GrantFiled: February 3, 2016Date of Patent: September 24, 2019Assignee: Google LLCInventors: Matthew Strecker Burriesci, David Kent German, Mathieu Gagne, Michael Kleber, Jonathan Frank Guarino, Guy Maor
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Patent number: 8843864Abstract: The invention provides a method for performing statistical static timing analysis using a novel on-chip variation model, referred to as Sensitivity-based Complex Statistical On-Chip Variation (SCS-OCV). SCS-OCV introduces complex variation concept to resolve the blocking technical issue of combining local random variations, enabling accurate calculation of statistical variations with correlations, such as common-path pessimism removal (CPPR). SCS-OCV proposes practical statistical min/max operations for random variations that can guarantee pessimism at nominal and targeted N-sigma corner, and extends the method to handle complex variations, enabling graph-based full arrival/required time propagation under variable compaction. SCS-OCV provides a statistical corner evaluation method for complex random variables that can transform vector-based parametric timing information to the single-value corner-based timing report, and based on the method derives equations to bridge POCV/SSTA with LOCV.Type: GrantFiled: August 16, 2013Date of Patent: September 23, 2014Assignee: Synopsys, Inc.Inventors: Jiayong Le, Mustafa Celik, Guy Maor, Ayhan Mutlu
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Publication number: 20140047403Abstract: The invention provides a method for performing statistical static timing analysis using a novel on-chip variation model, referred to as Sensitivity-based Complex Statistical On-Chip Variation (SCS-OCV). SCS-OCV introduces complex variation concept to resolve the blocking technical issue of combining local random variations, enabling accurate calculation of statistical variations with correlations, such as common-path pessimism removal (CPPR). SCS-OCV proposes practical statistical min/max operations for random variations that can guarantee pessimism at nominal and targeted N-sigma corner, and extends the method to handle complex variations, enabling graph-based full arrival/required time propagation under variable compaction. SCS-OCV provides a statistical corner evaluation method for complex random variables that can transform vector-based parametric timing information to the single-value corner-based timing report, and based on the method derives equations to bridge POCV/SSTA with LOCV.Type: ApplicationFiled: August 16, 2013Publication date: February 13, 2014Applicant: Synopsys, Inc.Inventors: Jiayong Le, Mustafa Celik, Guy Maor, Ayhan Mutlu
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Patent number: 8627250Abstract: The invention provides a method and system for performing Static Timing Analysis on SoC (System on a Chip) designs. The invention solves a longstanding problem with timing analysis of designs, namely, the ability to multi-thread the design under analysis. The invention provides for slicing a design into levels, further decomposing each level into gates, and the multi-threaded processing of gates so that the solution of large design analysis is generated significantly faster than current approaches. Further, the invention provides that only one level exists in the RAM at any time. Once the arrival time on the level is computed, the data is saved to disk immediately. Because the memory footprint is sub-linear to the size of the design, entire system-on-a chip designs may be run on inexpensive, off-the-shelf hardware.Type: GrantFiled: July 2, 2013Date of Patent: January 7, 2014Assignee: Synopsys, Inc.Inventors: Guy Maor, Chin-Wei Jim Chang, Yuji Kukimoto, Haobin Li
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Publication number: 20130298098Abstract: The invention provides a method and system for performing Static Timing Analysis on SoC (System on a Chip) designs. The invention solves a longstanding problem with timing analysis of designs, namely, the ability to multi-thread the design under analysis. The invention provides for slicing a design into levels, further decomposing each level into gates, and the multi-threaded processing of gates so that the solution of large design analysis is generated significantly faster than current approaches. Further, the invention provides that only one level exists in the RAM at any time. Once the arrival time on the level is computed, the data is saved to disk immediately. Because the memory footprint is sub-linear to the size of the design, entire system-on-a chip designs may be run on inexpensive, off-the-shelf hardware.Type: ApplicationFiled: July 2, 2013Publication date: November 7, 2013Inventors: Guy Maor, Chin-Wei Jim Chang, Yuji Kukimoto, Haobin Li
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Patent number: 8555222Abstract: The invention provides a method for performing statistical static timing analysis using a novel on-chip variation model, referred to as Sensitivity-based Complex Statistical On-Chip Variation (SCS-OCV). SCS-OCV introduces complex variation concept to resolve the blocking technical issue of combining local random variations, enabling accurate calculation of statistical variations with correlations, such as common-path pessimism removal (CPPR). SCS-OCV proposes practical statistical min/max operations for random variations that can guarantee pessimism at nominal and targeted N-sigma corner, and extends the method to handle complex variations, enabling graph-based full arrival/required time propagation under variable compaction. SCS-OCV provides a statistical corner evaluation method for complex random variables that can transform vector-based parametric timing information to the single-value corner-based timing report, and based on the method derives equations to bridge POCV/SSTA with LOCV.Type: GrantFiled: March 4, 2013Date of Patent: October 8, 2013Assignee: Synopsys, Inc.Inventors: Jiayong Le, Mustafa Celik, Guy Maor, Ayhan Mutlu
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Patent number: 8504960Abstract: The invention provides a method and system for performing Static Timing Analysis on SoC (System on a Chip) designs. The invention solves a longstanding problem with timing analysis of designs, namely, the ability to multi-thread the design under analysis. The invention provides for slicing a design into levels, further decomposing each level into gates, and the multi-threaded processing of gates so that the solution of large design analysis is generated significantly faster than current approaches. Further, the invention provides that only one level exists in the RAM at any time. Once the arrival time on the level is computed, the data is saved to disk immediately. Because the memory footprint is sub-linear to the size of the design, entire system-on-a chip designs may be nm on inexpensive, off-the-shelf hardware.Type: GrantFiled: May 16, 2008Date of Patent: August 6, 2013Assignee: Synopsys, Inc.Inventors: Guy Maor, Chih-Wei Jim Chang, Yuji Kukimoto, Haobin Li
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Publication number: 20130179851Abstract: The invention provides a method for performing statistical static timing analysis using a novel on-chip variation model, referred to as Sensitivity-based Complex Statistical On-Chip Variation (SCS-OCV). SCS-OCV introduces complex variation concept to resolve the blocking technical issue of combining local random variations, enabling accurate calculation of statistical variations with correlations, such as common-path pessimism removal (CPPR). SCS-OCV proposes practical statistical min/max operations for random variations that can guarantee pessimism at nominal and targeted N-sigma corner, and extends the method to handle complex variations, enabling graph-based full arrival/required time propagation under variable compaction. SCS-OCV provides a statistical corner evaluation method for complex random variables that can transform vector-based parametric timing information to the single-value corner-based timing report, and based on the method derives equations to bridge POCV/SSTA with LOCV.Type: ApplicationFiled: March 4, 2013Publication date: July 11, 2013Inventors: Jiayong Le, Mustafa Celik, Guy Maor, Ayhan Mutlu
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Patent number: 8407640Abstract: The invention provides a method for performing statistical static timing analysis using a novel on-chip variation model, referred to as Sensitivity-based Complex Statistical On-Chip Variation (SCS-OCV). SCS-OCV introduces complex variation concept to resolve the blocking technical issue of combining local random variations, enabling accurate calculation of statistical variations with correlations, such as common-path pessimism removal (CPPR). SCS-OCV proposes practical statistical min/max operations for random variations that can guarantee pessimism at nominal and targeted N-sigma corner, and extends the method to handle complex variations, enabling graph-based full arrival/required time propagation under variable compaction. SCS-OCV provides a statistical corner evaluation method for complex random variables that can transform vector-based parametric timing information to the single-value corner-based timing report, and based on the method derives equations to bridge POCV/SSTA with LOCV.Type: GrantFiled: August 23, 2011Date of Patent: March 26, 2013Assignee: Synopsys, Inc.Inventors: Jiayong Le, Mustafa Celik, Guy Maor, Ayhan Mutlu
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Publication number: 20120072880Abstract: The invention provides a method for performing statistical static timing analysis using a novel on-chip variation model, referred to as Sensitivity-based Complex Statistical On-Chip Variation (SCS-OCV). SCS-OCV introduces complex variation concept to resolve the blocking technical issue of combining local random variations, enabling accurate calculation of statistical variations with correlations, such as common-path pessimism removal (CPPR). SCS-OCV proposes practical statistical min/max operations for random variations that can guarantee pessimism at nominal and targeted N-sigma corner, and extends the method to handle complex variations, enabling graph-based full arrival/required time propagation under variable compaction. SCS-OCV provides a statistical corner evaluation method for complex random variables that can transform vector-based parametric timing information to the single-value corner-based timing report, and based on the method derives equations to bridge POCV/SSTA with LOCV.Type: ApplicationFiled: August 23, 2011Publication date: March 22, 2012Inventors: Jiayong Le, Mustafa Celik, Guy Maor, Ayhan Mutlu
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Publication number: 20100131911Abstract: The invention provides a method and system for performing Static Timing Analysis on SoC (System on a Chip) designs. The invention solves a longstanding problem with timing analysis of designs, namely, the ability to multi-thread the design under analysis. The invention provides for slicing a design into levels, further decomposing each level into gates, and the multi-threaded processing of gates so that the solution of large design analysis is generated significantly faster than current approaches. Further, the invention provides that only one level exists in the RAM at any time. Once the arrival time on the level is computed, the data is saved to disk immediately. Because the memory footprint is sub-linear to the size of the design, entire system-on-a chip designs may be nm on inexpensive, off-the-shelf hardware.Type: ApplicationFiled: May 16, 2008Publication date: May 27, 2010Inventors: Guy Maor, Chih-Wei Jim Chang, Yuji Kukimoto, Haobin Li