Abstract: A system and method for automatically generating a composed audio output sequence of a prescribed, utilizing a unique marker syntax that provides compatibility with MIDI standards and permits musical integrity preservation during automatic audio output sequence generation.

Abstract: A system and method for automatically generating a composed audio output sequence of a prescribed, utilizing a unique marker syntax that provides compatibility with MIDI standards and permits musical integrity preservation during automatic audio output sequence generation.

Abstract: Methods and systems for detecting a fundamental beat frequency in a predetermined time interval of a music signal are disclosed. The frequency may be detected by processing a music signal with the discrete wavelet transform to obtain a set of coefficients. A subset of the coefficients may be processed to obtain a plurality of candidate beat frequencies contained in the corresponding portion of the music signal. Harmonic relationships between the candidate beat frequencies may be determined, and the fundamental beat frequency may then be determined based upon the determined harmonic relationships.

Abstract: The apparatus comprises a manually operable device producing pulses which directly or after integration, determine the rate of replay of the digital audio. These pulses are counted by a counter. Each pulse corresponds to 1.5/500 s audio. The counter is reset at the rate F.sub.s /2048 where f.sub.s is the constant output sampling rate and its contents are held in a latch whose contents are inversely proportional to the replay sampling period. Adders add the contents of the counter into overflowing accumulators and clocked at the KHz fixed sampling rate f.sub.s and 128 times this rate respectively. The number of SPR of the first accumulator represents the sample displacement while the MSB of the second accumulator provides the replay clock. The sample displacement (d) represents the displacement between an output sample and an input sample and controls a two stage interpolation by way of a finite impulse response filter and a linear interpolating filter.

Abstract: For both recording and replay, a digital audio tape (14) is accelerated very rapidly by a motor servo (9), motor (8) and capstan (7) so that the tape speed overshoots nominal speed range before settling back to this range in an oscillatory manner. The digital samples are recorded and replayed via a head (15), a random access memory (16) and input/output electronics (19). During recording, the store (17) is precharged by starting to write in as soon as acceleration is initiated. Read-out to the tape is initiated as soon as the tape first reaches the nominal speed range. Uniformity of samples as recorded on the tape is preserved by clocking a read address generator (21) at a rate proportional to tape speed, signaled by a tachometer (7). The write address generator is clocked at the constant sampling rate. For replay the write address generator is clocked at the tape speed rate while the read address generator (21) is clocked at the constant sample rate.

Abstract: In producing an edited tape (31) the lead-in material up to a first edit point is separated from the lead-out material running from a second edit point by a space containing unwanted material and accommodating the actual or notional splice. The unwanted material ensures correct operation of error protection for all of the wanted material on replay. The first and second edit points are marked by codes placed on the tape (31) by a code processor (43) and supplementary head (42). During replay the digital data recovered from the tape by a head (32) is entered into a random access buffer store (34) under control of a write address generator (38) and read out to output electronics (37) under control of a read address generator (39) running at the audio sampling rate.

Abstract: Equidistant timing pulses are counted during the time between the arrival of a first pulse edge of a first signal sequence and the arrival of a following second pulse edge of another signal sequence and are averaged to a mean value with equidistant timing pulses of an immediately preceding count between two pulse edges of the two signal sequences. The continuously formed mean values are accumulated with mean values of preceding cycles and in each case the least significant bit is further processed.

Abstract: A digital data processor comprises a high speed processor (50) having input ports (52) and output ports (54), a memory (56), and a slow speed support processor (58), the memory being accessible to both the high speed and slow speed processors. The high speed processor can effect processing in dependence upon parameters written into the memory by the slow speed processor and which may have been derived by analyzing data supplied to the slow speed processor from the high speed processor via the memory.